^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * OMAP IOMMU quirks for various TI SoCs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2015-2019 Texas Instruments Incorporated - https://www.ti.com/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Suman Anna <s-anna@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "clockdomain.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "powerdomain.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) struct pwrdm_link {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) struct powerdomain *pwrdm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) struct list_head node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) static DEFINE_SPINLOCK(iommu_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) static struct clockdomain *emu_clkdm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) static atomic_t emu_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static void omap_iommu_dra7_emu_swsup_config(struct platform_device *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) bool enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct device_node *np = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) if (!of_device_is_compatible(np, "ti,dra7-dsp-iommu"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) if (!emu_clkdm) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) emu_clkdm = clkdm_lookup("emu_clkdm");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) if (WARN_ON_ONCE(!emu_clkdm))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) spin_lock_irqsave(&iommu_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) if (enable && (atomic_inc_return(&emu_count) == 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) clkdm_deny_idle(emu_clkdm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) else if (!enable && (atomic_dec_return(&emu_count) == 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) clkdm_allow_idle(emu_clkdm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) spin_unlock_irqrestore(&iommu_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static struct powerdomain *_get_pwrdm(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) struct clk_hw_omap *hwclk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct clockdomain *clkdm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct powerdomain *pwrdm = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct pwrdm_link *entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static LIST_HEAD(cache);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) spin_lock_irqsave(&iommu_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) list_for_each_entry(entry, &cache, node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) if (entry->dev == dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) pwrdm = entry->pwrdm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) spin_unlock_irqrestore(&iommu_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) if (pwrdm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) return pwrdm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) clk = of_clk_get(dev->of_node->parent, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) if (IS_ERR(clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) dev_err(dev, "no fck found\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) hwclk = to_clk_hw_omap(__clk_get_hw(clk));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) clk_put(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) if (!hwclk || !hwclk->clkdm_name) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) dev_err(dev, "no hwclk data\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) clkdm = clkdm_lookup(hwclk->clkdm_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) if (!clkdm) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) dev_err(dev, "clkdm not found: %s\n", hwclk->clkdm_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) pwrdm = clkdm_get_pwrdm(clkdm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) if (!pwrdm) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) dev_err(dev, "pwrdm not found: %s\n", clkdm->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) entry = kmalloc(sizeof(*entry), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) if (entry) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) entry->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) entry->pwrdm = pwrdm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) spin_lock_irqsave(&iommu_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) list_add(&entry->node, &cache);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) spin_unlock_irqrestore(&iommu_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return pwrdm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) int omap_iommu_set_pwrdm_constraint(struct platform_device *pdev, bool request,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) u8 *pwrst)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) struct powerdomain *pwrdm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) u8 next_pwrst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) pwrdm = _get_pwrdm(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) if (!pwrdm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) if (request) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) *pwrst = pwrdm_read_next_pwrst(pwrdm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) omap_iommu_dra7_emu_swsup_config(pdev, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) if (*pwrst > PWRDM_POWER_RET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) next_pwrst = request ? PWRDM_POWER_ON : *pwrst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) ret = pwrdm_set_next_pwrst(pwrdm, next_pwrst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) if (!request)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) omap_iommu_dra7_emu_swsup_config(pdev, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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