^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * OMAP2420 clockdomains
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2008-2011 Texas Instruments, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2008-2010 Nokia Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Paul Walmsley, Jouni Högander
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * This file contains clockdomains and clockdomain wakeup dependencies
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * for OMAP2420 chips. Some notes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * A useful validation rule for struct clockdomain: Any clockdomain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * referenced by a wkdep_srcs must have a dep_bit assigned. So
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * wkdep_srcs are really just software-controllable dependencies.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * Non-software-controllable dependencies do exist, but they are not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * encoded below (yet).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * 24xx does not support programmable sleep dependencies (SLEEPDEP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * The overly-specific dep_bit names are due to a bit name collision
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * with CM_FCLKEN_{DSP,IVA2}. The DSP/IVA2 PM_WKDEP and CM_SLEEPDEP shift
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * value are the same for all powerdomains: 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * XXX should dep_bit be a mask, so we can test to see if it is 0 as a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * sanity check?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * XXX encode hardware fixed wakeup dependencies -- esp. for 3430 CORE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * To-Do List
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * -> Port the Sleep/Wakeup dependencies for the domains
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * from the Power domain framework
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include "soc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include "clockdomain.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include "prm2xxx_3xxx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include "cm2xxx_3xxx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include "cm-regbits-24xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #include "prm-regbits-24xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * Clockdomain dependencies for wkdeps
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * XXX Hardware dependencies (e.g., dependencies that cannot be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * changed in software) are not included here yet, but should be.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) /* Wakeup dependency source arrays */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /* 2420-specific possible wakeup dependencies */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) /* 2420 PM_WKDEP_MPU: CORE, DSP, WKUP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static struct clkdm_dep mpu_2420_wkdeps[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) { .clkdm_name = "core_l3_clkdm" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) { .clkdm_name = "core_l4_clkdm" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) { .clkdm_name = "dsp_clkdm" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) { .clkdm_name = "wkup_clkdm" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) { NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) /* 2420 PM_WKDEP_CORE: DSP, GFX, MPU, WKUP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static struct clkdm_dep core_2420_wkdeps[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) { .clkdm_name = "dsp_clkdm" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) { .clkdm_name = "gfx_clkdm" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) { .clkdm_name = "mpu_clkdm" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) { .clkdm_name = "wkup_clkdm" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) { NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * 2420-only clockdomains
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static struct clockdomain mpu_2420_clkdm = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .name = "mpu_clkdm",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .pwrdm = { .name = "mpu_pwrdm" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .flags = CLKDM_CAN_HWSUP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .wkdep_srcs = mpu_2420_wkdeps,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static struct clockdomain iva1_2420_clkdm = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .name = "iva1_clkdm",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .pwrdm = { .name = "dsp_pwrdm" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .flags = CLKDM_CAN_HWSUP_SWSUP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .dep_bit = OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .wkdep_srcs = dsp_24xx_wkdeps,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .clktrctrl_mask = OMAP2420_AUTOSTATE_IVA_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static struct clockdomain dsp_2420_clkdm = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .name = "dsp_clkdm",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .pwrdm = { .name = "dsp_pwrdm" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .flags = CLKDM_CAN_HWSUP_SWSUP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSP_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static struct clockdomain gfx_2420_clkdm = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) .name = "gfx_clkdm",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .pwrdm = { .name = "gfx_pwrdm" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .flags = CLKDM_CAN_HWSUP_SWSUP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .wkdep_srcs = gfx_24xx_wkdeps,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .clktrctrl_mask = OMAP24XX_AUTOSTATE_GFX_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static struct clockdomain core_l3_2420_clkdm = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .name = "core_l3_clkdm",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) .pwrdm = { .name = "core_pwrdm" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .flags = CLKDM_CAN_HWSUP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .wkdep_srcs = core_2420_wkdeps,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .clktrctrl_mask = OMAP24XX_AUTOSTATE_L3_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) static struct clockdomain core_l4_2420_clkdm = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) .name = "core_l4_clkdm",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .pwrdm = { .name = "core_pwrdm" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .flags = CLKDM_CAN_HWSUP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .wkdep_srcs = core_2420_wkdeps,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .clktrctrl_mask = OMAP24XX_AUTOSTATE_L4_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static struct clockdomain dss_2420_clkdm = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .name = "dss_clkdm",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .pwrdm = { .name = "core_pwrdm" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .flags = CLKDM_CAN_HWSUP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSS_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static struct clockdomain *clockdomains_omap242x[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) &wkup_common_clkdm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) &mpu_2420_clkdm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) &iva1_2420_clkdm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) &dsp_2420_clkdm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) &gfx_2420_clkdm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) &core_l3_2420_clkdm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) &core_l4_2420_clkdm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) &dss_2420_clkdm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) void __init omap242x_clockdomains_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) if (!cpu_is_omap242x())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) clkdm_register_platform_funcs(&omap2_clkdm_operations);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) clkdm_register_clkdms(clockdomains_omap242x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) clkdm_complete_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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