^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * OMAP3-common clock function prototypes and macros
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2007-2010 Texas Instruments, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2007-2010 Nokia Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #ifndef __ARCH_ARM_MACH_OMAP2_CLOCK3XXX_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define __ARCH_ARM_MACH_OMAP2_CLOCK3XXX_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) int omap3xxx_clk_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) int omap3_core_dpll_m2_set_rate(struct clk_hw *clk, unsigned long rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) unsigned long parent_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) extern struct clk *sdrc_ick_p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) extern struct clk *arm_fck_p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) extern const struct clkops clkops_noncore_dpll_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #endif