^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2005 Nokia Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Author: Paul Mundt <paul.mundt@nokia.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Modified from the original mach-omap/omap2/board-generic.c did by Paul
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * to support the OMAP2+ device tree boards with an unique board file.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/irqdomain.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/clocksource.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/setup.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <asm/system_info.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include "common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) static const struct of_device_id omap_dt_match_table[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) { .compatible = "simple-bus", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) { .compatible = "ti,omap-infra", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) static void __init __maybe_unused omap_generic_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) pdata_quirks_init(omap_dt_match_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) omap_soc_device_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /* Clocks are needed early, see drivers/clocksource for the rest */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static void __init __maybe_unused omap_init_time_of(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) omap_clk_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) timer_probe();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /* Used by am437x for ARM timer in non-SMP configurations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #if !defined(CONFIG_SMP) && defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) void tick_broadcast(const struct cpumask *mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #ifdef CONFIG_SOC_OMAP2420
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static const char *const omap242x_boards_compat[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) "ti,omap2420",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .reserve = omap_reserve,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .map_io = omap242x_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .init_early = omap2420_init_early,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .init_machine = omap_generic_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .init_time = omap_init_time_of,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .dt_compat = omap242x_boards_compat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .restart = omap2xxx_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) MACHINE_END
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #ifdef CONFIG_SOC_OMAP2430
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static const char *const omap243x_boards_compat[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) "ti,omap2430",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) .reserve = omap_reserve,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .map_io = omap243x_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .init_early = omap2430_init_early,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .init_machine = omap_generic_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .init_time = omap_init_time_of,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .dt_compat = omap243x_boards_compat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .restart = omap2xxx_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) MACHINE_END
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #ifdef CONFIG_ARCH_OMAP3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) /* Some boards need board name for legacy userspace in /proc/cpuinfo */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static const char *const n900_boards_compat[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) "nokia,omap3-n900",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) /* Set system_rev from atags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) static void __init rx51_set_system_rev(const struct tag *tags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) const struct tag *tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) if (tags->hdr.tag != ATAG_CORE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) for_each_tag(tag, tags) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) if (tag->hdr.tag == ATAG_REVISION) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) system_rev = tag->u.revision.rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /* Legacy userspace on Nokia N900 needs ATAGS exported in /proc/atags,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * save them while the data is still not overwritten
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static void __init rx51_reserve(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) const struct tag *tags = (const struct tag *)(PAGE_OFFSET + 0x100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) save_atags(tags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) rx51_set_system_rev(tags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) omap_reserve();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) DT_MACHINE_START(OMAP3_N900_DT, "Nokia RX-51 board")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .reserve = rx51_reserve,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) .map_io = omap3_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .init_early = omap3430_init_early,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .init_machine = omap_generic_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .init_late = omap3_init_late,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .init_time = omap_init_time_of,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .dt_compat = n900_boards_compat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .restart = omap3xxx_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) MACHINE_END
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) /* Generic omap3 boards, most boards can use these */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static const char *const omap3_boards_compat[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) "ti,omap3430",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) "ti,omap3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) .reserve = omap_reserve,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) .map_io = omap3_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) .init_early = omap3430_init_early,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) .init_machine = omap_generic_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) .init_late = omap3_init_late,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) .init_time = omap_init_time_of,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) .dt_compat = omap3_boards_compat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) .restart = omap3xxx_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) MACHINE_END
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static const char *const omap36xx_boards_compat[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) "ti,omap3630",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) "ti,omap36xx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) DT_MACHINE_START(OMAP36XX_DT, "Generic OMAP36xx (Flattened Device Tree)")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) .reserve = omap_reserve,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) .map_io = omap3_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .init_early = omap3630_init_early,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) .init_machine = omap_generic_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) .init_late = omap3_init_late,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) .init_time = omap_init_time_of,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) .dt_compat = omap36xx_boards_compat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) .restart = omap3xxx_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) MACHINE_END
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) static const char *const omap3_gp_boards_compat[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) "ti,omap3-beagle",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) "timll,omap3-devkit8000",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) .reserve = omap_reserve,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) .map_io = omap3_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) .init_early = omap3430_init_early,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) .init_machine = omap_generic_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) .init_late = omap3_init_late,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) .init_time = omap_init_time_of,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) .dt_compat = omap3_gp_boards_compat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) .restart = omap3xxx_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) MACHINE_END
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) static const char *const am3517_boards_compat[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) "ti,am3517",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) DT_MACHINE_START(AM3517_DT, "Generic AM3517 (Flattened Device Tree)")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) .reserve = omap_reserve,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) .map_io = omap3_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) .init_early = am35xx_init_early,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) .init_machine = omap_generic_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) .init_late = omap3_init_late,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) .init_time = omap_init_time_of,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) .dt_compat = am3517_boards_compat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) .restart = omap3xxx_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) MACHINE_END
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) #ifdef CONFIG_SOC_TI81XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) static const char *const ti814x_boards_compat[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) "ti,dm8148",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) "ti,dm814",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) DT_MACHINE_START(TI814X_DT, "Generic ti814x (Flattened Device Tree)")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) .reserve = omap_reserve,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) .map_io = ti81xx_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) .init_early = ti814x_init_early,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) .init_machine = omap_generic_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) .init_late = ti81xx_init_late,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) .init_time = omap_init_time_of,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) .dt_compat = ti814x_boards_compat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) .restart = ti81xx_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) MACHINE_END
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) static const char *const ti816x_boards_compat[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) "ti,dm8168",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) "ti,dm816",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) DT_MACHINE_START(TI816X_DT, "Generic ti816x (Flattened Device Tree)")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) .reserve = omap_reserve,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) .map_io = ti81xx_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) .init_early = ti816x_init_early,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) .init_machine = omap_generic_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) .init_late = ti81xx_init_late,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) .init_time = omap_init_time_of,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) .dt_compat = ti816x_boards_compat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) .restart = ti81xx_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) MACHINE_END
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) #ifdef CONFIG_SOC_AM33XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) static const char *const am33xx_boards_compat[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) "ti,am33xx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) .reserve = omap_reserve,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) .map_io = am33xx_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) .init_early = am33xx_init_early,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) .init_machine = omap_generic_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) .init_late = am33xx_init_late,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) .init_time = omap_init_time_of,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) .dt_compat = am33xx_boards_compat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) .restart = am33xx_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) MACHINE_END
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) #ifdef CONFIG_ARCH_OMAP4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) static const char *const omap4_boards_compat[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) "ti,omap4460",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) "ti,omap4430",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) "ti,omap4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) .l2c_aux_val = OMAP_L2C_AUX_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) .l2c_aux_mask = 0xcf9fffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) .l2c_write_sec = omap4_l2c310_write_sec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) .reserve = omap_reserve,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) .smp = smp_ops(omap4_smp_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) .map_io = omap4_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) .init_early = omap4430_init_early,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) .init_irq = omap_gic_of_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) .init_machine = omap_generic_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) .init_late = omap4430_init_late,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) .init_time = omap_init_time_of,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) .dt_compat = omap4_boards_compat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) .restart = omap44xx_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) MACHINE_END
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) #ifdef CONFIG_SOC_OMAP5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) static const char *const omap5_boards_compat[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) "ti,omap5432",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) "ti,omap5430",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) "ti,omap5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) DT_MACHINE_START(OMAP5_DT, "Generic OMAP5 (Flattened Device Tree)")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) #if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) .dma_zone_size = SZ_2G,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) .reserve = omap_reserve,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) .smp = smp_ops(omap4_smp_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) .map_io = omap5_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) .init_early = omap5_init_early,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) .init_irq = omap_gic_of_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) .init_machine = omap_generic_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) .init_late = omap5_init_late,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) .init_time = omap5_realtime_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) .dt_compat = omap5_boards_compat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) .restart = omap44xx_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) MACHINE_END
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) #ifdef CONFIG_SOC_AM43XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) static const char *const am43_boards_compat[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) "ti,am4372",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) "ti,am43",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) DT_MACHINE_START(AM43_DT, "Generic AM43 (Flattened Device Tree)")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) .l2c_aux_val = OMAP_L2C_AUX_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) .l2c_aux_mask = 0xcf9fffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) .l2c_write_sec = omap4_l2c310_write_sec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) .map_io = am33xx_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) .init_early = am43xx_init_early,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) .init_late = am43xx_init_late,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) .init_irq = omap_gic_of_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) .init_machine = omap_generic_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) .init_time = omap_init_time_of,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) .dt_compat = am43_boards_compat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) .restart = omap44xx_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) MACHINE_END
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) #ifdef CONFIG_SOC_DRA7XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) static const char *const dra74x_boards_compat[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) "ti,dra762",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) "ti,am5728",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) "ti,am5726",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) "ti,dra742",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) "ti,dra7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) DT_MACHINE_START(DRA74X_DT, "Generic DRA74X (Flattened Device Tree)")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) #if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) .dma_zone_size = SZ_2G,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) .reserve = omap_reserve,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) .smp = smp_ops(omap4_smp_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) .map_io = dra7xx_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) .init_early = dra7xx_init_early,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) .init_late = dra7xx_init_late,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) .init_irq = omap_gic_of_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) .init_machine = omap_generic_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) .init_time = omap5_realtime_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) .dt_compat = dra74x_boards_compat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) .restart = omap44xx_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) MACHINE_END
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) static const char *const dra72x_boards_compat[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) "ti,am5718",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) "ti,am5716",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) "ti,dra722",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) "ti,dra718",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) DT_MACHINE_START(DRA72X_DT, "Generic DRA72X (Flattened Device Tree)")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) #if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) .dma_zone_size = SZ_2G,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) .reserve = omap_reserve,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) .map_io = dra7xx_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) .init_early = dra7xx_init_early,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) .init_late = dra7xx_init_late,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) .init_irq = omap_gic_of_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) .init_machine = omap_generic_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) .init_time = omap5_realtime_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) .dt_compat = dra72x_boards_compat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) .restart = omap44xx_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) MACHINE_END
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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