^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Platform level USB initialization for FS USB OTG controller on omap1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2004 Texas Instruments, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <mach/mux.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <mach/usb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include "common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /* These routines should handle the standard chip-specific modes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * for usb0/1/2 ports, covering basic mux and transceiver setup.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * Some board-*.c files will need to set up additional mux options,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * like for suspend handling, vbus sensing, GPIOs, and the D+ pullup.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /* TESTED ON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * - 5912 OSK UDC, with *nonstandard* A-to-A cable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * - 1510 Innovator UDC with bundled usb0 cable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * - 1510 Innovator OHCI with bundled usb1/usb2 cable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * - 1510 Innovator OHCI with custom usb0 cable, feeding 5V VBUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * - 1710 custom development board using alternate pin group
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * - 1710 H3 (with usb1 mini-AB) using standard Mini-B or OTG cables
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define INT_USB_IRQ_GEN IH2_BASE + 20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define INT_USB_IRQ_NISO IH2_BASE + 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define INT_USB_IRQ_ISO IH2_BASE + 29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define INT_USB_IRQ_HGEN INT_USB_HHC_1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define INT_USB_IRQ_OTG IH2_BASE + 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #ifdef CONFIG_ARCH_OMAP_OTG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static void __init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) omap_otg_init(struct omap_usb_config *config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) u32 syscon;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) int alt_pingroup = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) u16 w;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /* NOTE: no bus or clock setup (yet?) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) syscon = omap_readl(OTG_SYSCON_1) & 0xffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) if (!(syscon & OTG_RESET_DONE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) pr_debug("USB resets not complete?\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) //omap_writew(0, OTG_IRQ_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /* pin muxing and transceiver pinouts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) if (config->pins[0] > 2) /* alt pingroup 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) alt_pingroup = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) syscon |= config->usb0_init(config->pins[0], is_usb0_device(config));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) syscon |= config->usb1_init(config->pins[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) syscon |= config->usb2_init(config->pins[2], alt_pingroup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) omap_writel(syscon, OTG_SYSCON_1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) syscon = config->hmc_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #ifdef CONFIG_USB_OTG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) if (config->otg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) syscon |= OTG_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) pr_debug("USB_TRANSCEIVER_CTRL = %03x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) omap_readl(USB_TRANSCEIVER_CTRL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) pr_debug("OTG_SYSCON_2 = %08x\n", omap_readl(OTG_SYSCON_2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) omap_writel(syscon, OTG_SYSCON_2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) printk("USB: hmc %d", config->hmc_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) if (!alt_pingroup)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) pr_cont(", usb2 alt %d wires", config->pins[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) else if (config->pins[0])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) pr_cont(", usb0 %d wires%s", config->pins[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) is_usb0_device(config) ? " (dev)" : "");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) if (config->pins[1])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) pr_cont(", usb1 %d wires", config->pins[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) if (!alt_pingroup && config->pins[2])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) pr_cont(", usb2 %d wires", config->pins[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) if (config->otg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) pr_cont(", Mini-AB on usb%d", config->otg - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) pr_cont("\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /* leave USB clocks/controllers off until needed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) w = omap_readw(ULPD_SOFT_REQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) w &= ~SOFT_USB_CLK_REQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) omap_writew(w, ULPD_SOFT_REQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) w = omap_readw(ULPD_CLOCK_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) w &= ~USB_MCLK_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) w |= DIS_USB_PVCI_CLK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) omap_writew(w, ULPD_CLOCK_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) syscon = omap_readl(OTG_SYSCON_1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #if IS_ENABLED(CONFIG_USB_OMAP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) if (config->otg || config->register_dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) struct platform_device *udc_device = config->udc_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) syscon &= ~DEV_IDLE_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) udc_device->dev.platform_data = config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) status = platform_device_register(udc_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) if (status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) pr_debug("can't register UDC device, %d\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #if IS_ENABLED(CONFIG_USB_OHCI_HCD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) if (config->otg || config->register_host) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) struct platform_device *ohci_device = config->ohci_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) syscon &= ~HST_IDLE_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) ohci_device->dev.platform_data = config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) status = platform_device_register(ohci_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) if (status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) pr_debug("can't register OHCI device, %d\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #ifdef CONFIG_USB_OTG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) if (config->otg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) struct platform_device *otg_device = config->otg_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) syscon &= ~OTG_IDLE_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) otg_device->dev.platform_data = config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) status = platform_device_register(otg_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) if (status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) pr_debug("can't register OTG device, %d\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) omap_writel(syscon, OTG_SYSCON_1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static void omap_otg_init(struct omap_usb_config *config) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) #if IS_ENABLED(CONFIG_USB_OMAP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) static struct resource udc_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) /* order is significant! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) { /* registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .start = UDC_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .end = UDC_BASE + 0xff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }, { /* general IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) .start = INT_USB_IRQ_GEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) }, { /* PIO IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) .start = INT_USB_IRQ_NISO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }, { /* SOF IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) .start = INT_USB_IRQ_ISO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) static u64 udc_dmamask = ~(u32)0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static struct platform_device udc_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) .name = "omap_udc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) .dma_mask = &udc_dmamask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) .coherent_dma_mask = 0xffffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) .num_resources = ARRAY_SIZE(udc_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) .resource = udc_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static inline void udc_device_init(struct omap_usb_config *pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) /* IRQ numbers for omap7xx */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) if(cpu_is_omap7xx()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) udc_resources[1].start = INT_7XX_USB_GENI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) udc_resources[2].start = INT_7XX_USB_NON_ISO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) udc_resources[3].start = INT_7XX_USB_ISO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) pdata->udc_device = &udc_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) static inline void udc_device_init(struct omap_usb_config *pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) #if IS_ENABLED(CONFIG_USB_OHCI_HCD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) /* The dmamask must be set for OHCI to work */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) static u64 ohci_dmamask = ~(u32)0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static struct resource ohci_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) .start = OMAP_OHCI_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) .end = OMAP_OHCI_BASE + 0xff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) .start = INT_USB_IRQ_HGEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) static struct platform_device ohci_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) .name = "ohci",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) .dma_mask = &ohci_dmamask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) .coherent_dma_mask = 0xffffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) .num_resources = ARRAY_SIZE(ohci_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) .resource = ohci_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) static inline void ohci_device_init(struct omap_usb_config *pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) if (cpu_is_omap7xx())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) ohci_resources[1].start = INT_7XX_USB_HHC_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) pdata->ohci_device = &ohci_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) pdata->ocpi_enable = &ocpi_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) static inline void ohci_device_init(struct omap_usb_config *pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) #if defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) static struct resource otg_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) /* order is significant! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) .start = OTG_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) .end = OTG_BASE + 0xff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) .start = INT_USB_IRQ_OTG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) static struct platform_device otg_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) .name = "omap_otg",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) .num_resources = ARRAY_SIZE(otg_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) .resource = otg_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) static inline void otg_device_init(struct omap_usb_config *pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) if (cpu_is_omap7xx())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) otg_resources[1].start = INT_7XX_USB_OTG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) pdata->otg_device = &otg_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) static inline void otg_device_init(struct omap_usb_config *pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) static u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) u32 syscon1 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) if (nwires == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) if (!cpu_is_omap15xx()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) u32 l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) /* pulldown D+/D- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) l = omap_readl(USB_TRANSCEIVER_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) l &= ~(3 << 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) omap_writel(l, USB_TRANSCEIVER_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) if (is_device) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) if (cpu_is_omap7xx()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) omap_cfg_reg(AA17_7XX_USB_DM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) omap_cfg_reg(W16_7XX_USB_PU_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) omap_cfg_reg(W17_7XX_USB_VBUSI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) omap_cfg_reg(W18_7XX_USB_DMCK_OUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) omap_cfg_reg(W19_7XX_USB_DCRST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) omap_cfg_reg(W4_USB_PUEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) if (nwires == 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) u32 l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) // omap_cfg_reg(P9_USB_DP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) // omap_cfg_reg(R8_USB_DM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) if (cpu_is_omap15xx()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) /* This works on 1510-Innovator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) /* NOTES:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) * - peripheral should configure VBUS detection!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) * - only peripherals may use the internal D+/D- pulldowns
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) * - OTG support on this port not yet written
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) /* Don't do this for omap7xx -- it causes USB to not work correctly */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) if (!cpu_is_omap7xx()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) l = omap_readl(USB_TRANSCEIVER_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) l &= ~(7 << 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) if (!is_device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) l |= (3 << 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) omap_writel(l, USB_TRANSCEIVER_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) return 3 << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) /* alternate pin config, external transceiver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) if (cpu_is_omap15xx()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) printk(KERN_ERR "no usb0 alt pin config on 15xx\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) omap_cfg_reg(V6_USB0_TXD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) omap_cfg_reg(W9_USB0_TXEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) omap_cfg_reg(W5_USB0_SE0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) if (nwires != 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) omap_cfg_reg(Y5_USB0_RCV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) /* NOTE: SPEED and SUSP aren't configured here. OTG hosts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) * may be able to use I2C requests to set those bits along
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) * with VBUS switching and overcurrent detection.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) if (nwires != 6) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) u32 l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) l = omap_readl(USB_TRANSCEIVER_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) l &= ~CONF_USB2_UNI_R;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) omap_writel(l, USB_TRANSCEIVER_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) switch (nwires) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) syscon1 = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) case 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) syscon1 = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) case 6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) syscon1 = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) u32 l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) omap_cfg_reg(AA9_USB0_VP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) omap_cfg_reg(R9_USB0_VM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) l = omap_readl(USB_TRANSCEIVER_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) l |= CONF_USB2_UNI_R;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) omap_writel(l, USB_TRANSCEIVER_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 0, nwires);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) return syscon1 << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) static u32 __init omap1_usb1_init(unsigned nwires)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) u32 syscon1 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) if (!cpu_is_omap15xx() && nwires != 6) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) u32 l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) l = omap_readl(USB_TRANSCEIVER_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) l &= ~CONF_USB1_UNI_R;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) omap_writel(l, USB_TRANSCEIVER_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) if (nwires == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) /* external transceiver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) omap_cfg_reg(USB1_TXD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) omap_cfg_reg(USB1_TXEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) if (nwires != 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) omap_cfg_reg(USB1_RCV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) if (cpu_is_omap15xx()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) omap_cfg_reg(USB1_SEO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) omap_cfg_reg(USB1_SPEED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) // SUSP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) } else if (cpu_is_omap1610() || cpu_is_omap5912()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) omap_cfg_reg(W13_1610_USB1_SE0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) omap_cfg_reg(R13_1610_USB1_SPEED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) // SUSP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) } else if (cpu_is_omap1710()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) omap_cfg_reg(R13_1710_USB1_SE0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) // SUSP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) pr_debug("usb%d cpu unrecognized\n", 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) switch (nwires) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) goto bad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) syscon1 = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) case 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) syscon1 = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) case 6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) syscon1 = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) omap_cfg_reg(USB1_VP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) omap_cfg_reg(USB1_VM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) if (!cpu_is_omap15xx()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) u32 l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) l = omap_readl(USB_TRANSCEIVER_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) l |= CONF_USB1_UNI_R;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) omap_writel(l, USB_TRANSCEIVER_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) bad:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 1, nwires);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) return syscon1 << 20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) static u32 __init omap1_usb2_init(unsigned nwires, unsigned alt_pingroup)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) u32 syscon1 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) if (alt_pingroup || nwires == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) if (!cpu_is_omap15xx() && nwires != 6) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) u32 l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) l = omap_readl(USB_TRANSCEIVER_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) l &= ~CONF_USB2_UNI_R;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) omap_writel(l, USB_TRANSCEIVER_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) /* external transceiver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) if (cpu_is_omap15xx()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) omap_cfg_reg(USB2_TXD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) omap_cfg_reg(USB2_TXEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) omap_cfg_reg(USB2_SEO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) if (nwires != 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) omap_cfg_reg(USB2_RCV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) /* there is no USB2_SPEED */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) } else if (cpu_is_omap16xx()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) omap_cfg_reg(V6_USB2_TXD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) omap_cfg_reg(W9_USB2_TXEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) omap_cfg_reg(W5_USB2_SE0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) if (nwires != 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) omap_cfg_reg(Y5_USB2_RCV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) // FIXME omap_cfg_reg(USB2_SPEED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) pr_debug("usb%d cpu unrecognized\n", 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) // omap_cfg_reg(USB2_SUSP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) switch (nwires) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) goto bad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) syscon1 = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) case 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) syscon1 = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) case 5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) goto bad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) case 6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) syscon1 = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) if (cpu_is_omap15xx()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) omap_cfg_reg(USB2_VP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) omap_cfg_reg(USB2_VM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) u32 l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) omap_cfg_reg(AA9_USB2_VP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) omap_cfg_reg(R9_USB2_VM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) l = omap_readl(USB_TRANSCEIVER_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) l |= CONF_USB2_UNI_R;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) omap_writel(l, USB_TRANSCEIVER_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) bad:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) 2, nwires);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) return syscon1 << 24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) #ifdef CONFIG_ARCH_OMAP15XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) /* ULPD_DPLL_CTRL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) #define DPLL_IOB (1 << 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) #define DPLL_PLL_ENABLE (1 << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) #define DPLL_LOCK (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) /* ULPD_APLL_CTRL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) #define APLL_NDPLL_SWITCH (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) static int omap_1510_usb_ohci_notifier(struct notifier_block *nb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) unsigned long event, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) struct device *dev = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) if (event != BUS_NOTIFY_ADD_DEVICE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) return NOTIFY_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) if (strncmp(dev_name(dev), "ohci", 4) == 0 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) dma_direct_set_offset(dev, PHYS_OFFSET, OMAP1510_LB_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) (u64)-1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) WARN_ONCE(1, "failed to set DMA offset\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) return NOTIFY_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) static struct notifier_block omap_1510_usb_ohci_nb = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) .notifier_call = omap_1510_usb_ohci_notifier,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) static void __init omap_1510_usb_init(struct omap_usb_config *config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) u16 w;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) config->usb0_init(config->pins[0], is_usb0_device(config));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) config->usb1_init(config->pins[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) config->usb2_init(config->pins[2], 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) val = omap_readl(MOD_CONF_CTRL_0) & ~(0x3f << 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) val |= (config->hmc_mode << 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) omap_writel(val, MOD_CONF_CTRL_0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) printk("USB: hmc %d", config->hmc_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) if (config->pins[0])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) pr_cont(", usb0 %d wires%s", config->pins[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) is_usb0_device(config) ? " (dev)" : "");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) if (config->pins[1])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) pr_cont(", usb1 %d wires", config->pins[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) if (config->pins[2])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) pr_cont(", usb2 %d wires", config->pins[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) pr_cont("\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) /* use DPLL for 48 MHz function clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) pr_debug("APLL %04x DPLL %04x REQ %04x\n", omap_readw(ULPD_APLL_CTRL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) omap_readw(ULPD_DPLL_CTRL), omap_readw(ULPD_SOFT_REQ));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) w = omap_readw(ULPD_APLL_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) w &= ~APLL_NDPLL_SWITCH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) omap_writew(w, ULPD_APLL_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) w = omap_readw(ULPD_DPLL_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) w |= DPLL_IOB | DPLL_PLL_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) omap_writew(w, ULPD_DPLL_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) w = omap_readw(ULPD_SOFT_REQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) w |= SOFT_UDC_REQ | SOFT_DPLL_REQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) omap_writew(w, ULPD_SOFT_REQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) while (!(omap_readw(ULPD_DPLL_CTRL) & DPLL_LOCK))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) cpu_relax();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) #if IS_ENABLED(CONFIG_USB_OMAP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) if (config->register_dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) udc_device.dev.platform_data = config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) status = platform_device_register(&udc_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) if (status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) pr_debug("can't register UDC device, %d\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) /* udc driver gates 48MHz by D+ pullup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) #if IS_ENABLED(CONFIG_USB_OHCI_HCD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) if (config->register_host) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) bus_register_notifier(&platform_bus_type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) &omap_1510_usb_ohci_nb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) ohci_device.dev.platform_data = config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) status = platform_device_register(&ohci_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) if (status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) pr_debug("can't register OHCI device, %d\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) /* hcd explicitly gates 48MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) static inline void omap_1510_usb_init(struct omap_usb_config *config) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) void __init omap1_usb_init(struct omap_usb_config *_pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) struct omap_usb_config *pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) pdata = kmemdup(_pdata, sizeof(*pdata), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) if (!pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) pdata->usb0_init = omap1_usb0_init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) pdata->usb1_init = omap1_usb1_init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) pdata->usb2_init = omap1_usb2_init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) udc_device_init(pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) ohci_device_init(pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) otg_device_init(pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) if (cpu_is_omap7xx() || cpu_is_omap16xx())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) omap_otg_init(pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) else if (cpu_is_omap15xx())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) omap_1510_usb_init(pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) printk(KERN_ERR "USB: No init for your chip yet\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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