^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * OMAP1 Dual-Mode Timers - platform device registration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Contains first level initialization routines which internally
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * generates timer device information and registers with linux
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * device model. It also has a low level function to change the timer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * input clock source.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Tarun Kanti DebBarma <tarun.kanti@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Thara Gopinath <thara@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * This program is free software; you can redistribute it and/or modify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * it under the terms of the GNU General Public License version 2 as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * published by the Free Software Foundation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * This program is distributed "as is" WITHOUT ANY WARRANTY of any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * kind, whether express or implied; without even the implied warranty
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * GNU General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/platform_data/dmtimer-omap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <clocksource/timer-ti-dm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include "soc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define OMAP1610_GPTIMER1_BASE 0xfffb1400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define OMAP1610_GPTIMER2_BASE 0xfffb1c00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define OMAP1610_GPTIMER3_BASE 0xfffb2400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define OMAP1610_GPTIMER4_BASE 0xfffb2c00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define OMAP1610_GPTIMER5_BASE 0xfffb3400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define OMAP1610_GPTIMER6_BASE 0xfffb3c00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define OMAP1610_GPTIMER7_BASE 0xfffb7400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define OMAP1610_GPTIMER8_BASE 0xfffbd400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define OMAP1_DM_TIMER_COUNT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static int omap1_dm_timer_set_src(struct platform_device *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) int source)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) int n = (pdev->id - 1) << 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) u32 l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) l = omap_readl(MOD_CONF_CTRL_1) & ~(0x03 << n);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) l |= source << n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) omap_writel(l, MOD_CONF_CTRL_1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static int __init omap1_dm_timer_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct dmtimer_platform_data *pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) struct platform_device *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) if (!cpu_is_omap16xx())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) for (i = 1; i <= OMAP1_DM_TIMER_COUNT; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct resource res[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) u32 base, irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) switch (i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) base = OMAP1610_GPTIMER1_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) irq = INT_1610_GPTIMER1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) base = OMAP1610_GPTIMER2_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) irq = INT_1610_GPTIMER2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) base = OMAP1610_GPTIMER3_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) irq = INT_1610_GPTIMER3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) case 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) base = OMAP1610_GPTIMER4_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) irq = INT_1610_GPTIMER4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) case 5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) base = OMAP1610_GPTIMER5_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) irq = INT_1610_GPTIMER5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) case 6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) base = OMAP1610_GPTIMER6_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) irq = INT_1610_GPTIMER6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) case 7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) base = OMAP1610_GPTIMER7_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) irq = INT_1610_GPTIMER7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) case 8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) base = OMAP1610_GPTIMER8_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) irq = INT_1610_GPTIMER8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * not supposed to reach here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * this is to remove warning.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) pdev = platform_device_alloc("omap_timer", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) if (!pdev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) pr_err("%s: Failed to device alloc for dmtimer%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) __func__, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) memset(res, 0, 2 * sizeof(struct resource));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) res[0].start = base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) res[0].end = base + 0x46;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) res[0].flags = IORESOURCE_MEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) res[1].start = irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) res[1].end = irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) res[1].flags = IORESOURCE_IRQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) ret = platform_device_add_resources(pdev, res,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) ARRAY_SIZE(res));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) dev_err(&pdev->dev, "%s: Failed to add resources.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) goto err_free_pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) if (!pdata) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) goto err_free_pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) pdata->set_timer_src = omap1_dm_timer_set_src;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) pdata->timer_capability = OMAP_TIMER_ALWON |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) OMAP_TIMER_NEEDS_RESET | OMAP_TIMER_HAS_DSP_IRQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) ret = platform_device_add_data(pdev, pdata, sizeof(*pdata));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) dev_err(&pdev->dev, "%s: Failed to add platform data.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) goto err_free_pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) ret = platform_device_add(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) dev_err(&pdev->dev, "%s: Failed to add platform device.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) goto err_free_pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) dev_dbg(&pdev->dev, " Registered.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) err_free_pdata:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) kfree(pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) err_free_pdev:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) platform_device_unregister(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) arch_initcall(omap1_dm_timer_init);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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