^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * linux/arch/arm/mach-omap1/io.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * OMAP1 I/O mapping code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/tlb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <mach/mux.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <mach/tc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/omap-dma.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include "iomap.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include "common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include "clock.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * The machine specific code may provide the extra mapping besides the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * default mapping provided here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static struct map_desc omap_io_desc[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) .virtual = OMAP1_IO_VIRT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) .pfn = __phys_to_pfn(OMAP1_IO_PHYS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) .length = OMAP1_IO_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) .type = MT_DEVICE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static struct map_desc omap7xx_io_desc[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) .virtual = OMAP7XX_DSP_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .pfn = __phys_to_pfn(OMAP7XX_DSP_START),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .length = OMAP7XX_DSP_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .type = MT_DEVICE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .virtual = OMAP7XX_DSPREG_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .pfn = __phys_to_pfn(OMAP7XX_DSPREG_START),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .length = OMAP7XX_DSPREG_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) .type = MT_DEVICE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #ifdef CONFIG_ARCH_OMAP15XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) static struct map_desc omap1510_io_desc[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .virtual = OMAP1510_DSP_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .pfn = __phys_to_pfn(OMAP1510_DSP_START),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .length = OMAP1510_DSP_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .type = MT_DEVICE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .virtual = OMAP1510_DSPREG_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .pfn = __phys_to_pfn(OMAP1510_DSPREG_START),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .length = OMAP1510_DSPREG_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .type = MT_DEVICE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #if defined(CONFIG_ARCH_OMAP16XX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static struct map_desc omap16xx_io_desc[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .virtual = OMAP16XX_DSP_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) .pfn = __phys_to_pfn(OMAP16XX_DSP_START),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .length = OMAP16XX_DSP_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .type = MT_DEVICE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .virtual = OMAP16XX_DSPREG_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .pfn = __phys_to_pfn(OMAP16XX_DSPREG_START),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .length = OMAP16XX_DSPREG_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .type = MT_DEVICE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) * Maps common IO regions for omap1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) static void __init omap1_map_common_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) iotable_init(omap_io_desc, ARRAY_SIZE(omap_io_desc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) void __init omap7xx_map_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) omap1_map_common_io();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) iotable_init(omap7xx_io_desc, ARRAY_SIZE(omap7xx_io_desc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #ifdef CONFIG_ARCH_OMAP15XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) void __init omap15xx_map_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) omap1_map_common_io();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #if defined(CONFIG_ARCH_OMAP16XX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) void __init omap16xx_map_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) omap1_map_common_io();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) iotable_init(omap16xx_io_desc, ARRAY_SIZE(omap16xx_io_desc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * Common low-level hardware init for omap1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) void __init omap1_init_early(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) omap_check_revision();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) * on a Posted Write in the TIPB Bridge".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) omap_writew(0x0, MPU_PUBLIC_TIPB_CNTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) omap_writew(0x0, MPU_PRIVATE_TIPB_CNTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) /* Must init clocks early to assure that timer interrupt works
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) omap1_clk_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) omap1_mux_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) void __init omap1_init_late(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) omap_serial_wakeup_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) * NOTE: Please use ioremap + __raw_read/write where possible instead of these
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) u8 omap_readb(u32 pa)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) return __raw_readb(OMAP1_IO_ADDRESS(pa));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) EXPORT_SYMBOL(omap_readb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) u16 omap_readw(u32 pa)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) return __raw_readw(OMAP1_IO_ADDRESS(pa));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) EXPORT_SYMBOL(omap_readw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) u32 omap_readl(u32 pa)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) return __raw_readl(OMAP1_IO_ADDRESS(pa));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) EXPORT_SYMBOL(omap_readl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) void omap_writeb(u8 v, u32 pa)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) __raw_writeb(v, OMAP1_IO_ADDRESS(pa));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) EXPORT_SYMBOL(omap_writeb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) void omap_writew(u16 v, u32 pa)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) __raw_writew(v, OMAP1_IO_ADDRESS(pa));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) EXPORT_SYMBOL(omap_writew);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) void omap_writel(u32 v, u32 pa)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) __raw_writel(v, OMAP1_IO_ADDRESS(pa));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) EXPORT_SYMBOL(omap_writel);