Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * OMAP7xx specific gpio init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Author:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *	Charulatha V <charu@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * This program is free software; you can redistribute it and/or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * modify it under the terms of the GNU General Public License as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * published by the Free Software Foundation version 2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  * kind, whether express or implied; without even the implied warranty
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  * GNU General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/platform_data/gpio-omap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <mach/irqs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include "soc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define OMAP7XX_GPIO1_BASE		0xfffbc000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define OMAP7XX_GPIO2_BASE		0xfffbc800
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define OMAP7XX_GPIO3_BASE		0xfffbd000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define OMAP7XX_GPIO4_BASE		0xfffbd800
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define OMAP7XX_GPIO5_BASE		0xfffbe000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define OMAP7XX_GPIO6_BASE		0xfffbe800
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define OMAP1_MPUIO_VBASE		OMAP1_MPUIO_BASE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) /* mpu gpio */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) static struct resource omap7xx_mpu_gpio_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 		.start	= OMAP1_MPUIO_VBASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 		.end	= OMAP1_MPUIO_VBASE + SZ_2K - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 		.flags	= IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 		.start	= INT_7XX_MPUIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 		.flags	= IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	.revision	= USHRT_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	.direction	= OMAP_MPUIO_IO_CNTL / 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	.datain		= OMAP_MPUIO_INPUT_LATCH / 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	.dataout	= OMAP_MPUIO_OUTPUT / 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	.irqstatus	= OMAP_MPUIO_GPIO_INT / 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	.irqenable	= OMAP_MPUIO_GPIO_MASKIT / 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	.irqenable_inv	= true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	.irqctrl	= OMAP_MPUIO_GPIO_INT_EDGE >> 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) static struct omap_gpio_platform_data omap7xx_mpu_gpio_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	.is_mpuio		= true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	.bank_width		= 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	.bank_stride		= 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	.regs                   = &omap7xx_mpuio_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) static struct platform_device omap7xx_mpu_gpio = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	.name           = "omap_gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	.id             = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	.dev            = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		.platform_data = &omap7xx_mpu_gpio_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	.num_resources = ARRAY_SIZE(omap7xx_mpu_gpio_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	.resource = omap7xx_mpu_gpio_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) /* gpio1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) static struct resource omap7xx_gpio1_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		.start	= OMAP7XX_GPIO1_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		.end	= OMAP7XX_GPIO1_BASE + SZ_2K - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		.flags	= IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		.start	= INT_7XX_GPIO_BANK1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		.flags	= IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	.revision	= USHRT_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	.direction	= OMAP7XX_GPIO_DIR_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	.datain		= OMAP7XX_GPIO_DATA_INPUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	.dataout	= OMAP7XX_GPIO_DATA_OUTPUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	.irqstatus	= OMAP7XX_GPIO_INT_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	.irqenable	= OMAP7XX_GPIO_INT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	.irqenable_inv	= true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	.irqctrl	= OMAP7XX_GPIO_INT_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) static struct omap_gpio_platform_data omap7xx_gpio1_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	.bank_width		= 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	.regs			= &omap7xx_gpio_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static struct platform_device omap7xx_gpio1 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	.name           = "omap_gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	.id             = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	.dev            = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		.platform_data = &omap7xx_gpio1_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	.num_resources = ARRAY_SIZE(omap7xx_gpio1_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	.resource = omap7xx_gpio1_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) /* gpio2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static struct resource omap7xx_gpio2_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		.start	= OMAP7XX_GPIO2_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		.end	= OMAP7XX_GPIO2_BASE + SZ_2K - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		.flags	= IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		.start	= INT_7XX_GPIO_BANK2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		.flags	= IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static struct omap_gpio_platform_data omap7xx_gpio2_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	.bank_width		= 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	.regs			= &omap7xx_gpio_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static struct platform_device omap7xx_gpio2 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	.name           = "omap_gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	.id             = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	.dev            = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		.platform_data = &omap7xx_gpio2_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	.num_resources = ARRAY_SIZE(omap7xx_gpio2_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	.resource = omap7xx_gpio2_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) /* gpio3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static struct resource omap7xx_gpio3_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		.start	= OMAP7XX_GPIO3_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		.end	= OMAP7XX_GPIO3_BASE + SZ_2K - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		.flags	= IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		.start	= INT_7XX_GPIO_BANK3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		.flags	= IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static struct omap_gpio_platform_data omap7xx_gpio3_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	.bank_width		= 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	.regs			= &omap7xx_gpio_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) static struct platform_device omap7xx_gpio3 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	.name           = "omap_gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	.id             = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	.dev            = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		.platform_data = &omap7xx_gpio3_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	.num_resources = ARRAY_SIZE(omap7xx_gpio3_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	.resource = omap7xx_gpio3_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) /* gpio4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static struct resource omap7xx_gpio4_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 		.start	= OMAP7XX_GPIO4_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		.end	= OMAP7XX_GPIO4_BASE + SZ_2K - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 		.flags	= IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		.start	= INT_7XX_GPIO_BANK4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		.flags	= IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) static struct omap_gpio_platform_data omap7xx_gpio4_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	.bank_width		= 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	.regs			= &omap7xx_gpio_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) static struct platform_device omap7xx_gpio4 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	.name           = "omap_gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	.id             = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	.dev            = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		.platform_data = &omap7xx_gpio4_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	.num_resources = ARRAY_SIZE(omap7xx_gpio4_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	.resource = omap7xx_gpio4_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) /* gpio5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) static struct resource omap7xx_gpio5_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		.start	= OMAP7XX_GPIO5_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		.end	= OMAP7XX_GPIO5_BASE + SZ_2K - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		.flags	= IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		.start	= INT_7XX_GPIO_BANK5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 		.flags	= IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) static struct omap_gpio_platform_data omap7xx_gpio5_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	.bank_width		= 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	.regs			= &omap7xx_gpio_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) static struct platform_device omap7xx_gpio5 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	.name           = "omap_gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	.id             = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	.dev            = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		.platform_data = &omap7xx_gpio5_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	.num_resources = ARRAY_SIZE(omap7xx_gpio5_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	.resource = omap7xx_gpio5_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) /* gpio6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) static struct resource omap7xx_gpio6_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		.start	= OMAP7XX_GPIO6_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		.end	= OMAP7XX_GPIO6_BASE + SZ_2K - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		.flags	= IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		.start	= INT_7XX_GPIO_BANK6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		.flags	= IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) static struct omap_gpio_platform_data omap7xx_gpio6_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	.bank_width		= 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	.regs			= &omap7xx_gpio_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) static struct platform_device omap7xx_gpio6 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	.name           = "omap_gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	.id             = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	.dev            = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		.platform_data = &omap7xx_gpio6_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	.num_resources = ARRAY_SIZE(omap7xx_gpio6_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	.resource = omap7xx_gpio6_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) static struct platform_device *omap7xx_gpio_dev[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	&omap7xx_mpu_gpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	&omap7xx_gpio1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	&omap7xx_gpio2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	&omap7xx_gpio3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	&omap7xx_gpio4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	&omap7xx_gpio5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	&omap7xx_gpio6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)  * omap7xx_gpio_init needs to be done before
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)  * machine_init functions access gpio APIs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)  * Hence omap7xx_gpio_init is a postcore_initcall.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) static int __init omap7xx_gpio_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	if (!cpu_is_omap7xx())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	for (i = 0; i < ARRAY_SIZE(omap7xx_gpio_dev); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 		platform_device_register(omap7xx_gpio_dev[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) postcore_initcall(omap7xx_gpio_init);