^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * OMAP16xx specific gpio init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Charulatha V <charu@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * This program is free software; you can redistribute it and/or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * modify it under the terms of the GNU General Public License as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * published by the Free Software Foundation version 2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * This program is distributed "as is" WITHOUT ANY WARRANTY of any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * kind, whether express or implied; without even the implied warranty
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * GNU General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/platform_data/gpio-omap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <mach/irqs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include "soc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define OMAP1610_GPIO1_BASE 0xfffbe400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define OMAP1610_GPIO2_BASE 0xfffbec00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define OMAP1610_GPIO3_BASE 0xfffbb400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define OMAP1610_GPIO4_BASE 0xfffbbc00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /* smart idle, enable wakeup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define SYSCONFIG_WORD 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /* mpu gpio */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static struct resource omap16xx_mpu_gpio_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) .start = OMAP1_MPUIO_VBASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) .end = OMAP1_MPUIO_VBASE + SZ_2K - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .start = INT_MPUIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) .revision = USHRT_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) .direction = OMAP_MPUIO_IO_CNTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .datain = OMAP_MPUIO_INPUT_LATCH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .dataout = OMAP_MPUIO_OUTPUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .irqstatus = OMAP_MPUIO_GPIO_INT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .irqenable = OMAP_MPUIO_GPIO_MASKIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .irqenable_inv = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static struct omap_gpio_platform_data omap16xx_mpu_gpio_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .is_mpuio = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .bank_width = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .bank_stride = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .regs = &omap16xx_mpuio_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static struct platform_device omap16xx_mpu_gpio = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) .name = "omap_gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .platform_data = &omap16xx_mpu_gpio_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .num_resources = ARRAY_SIZE(omap16xx_mpu_gpio_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) .resource = omap16xx_mpu_gpio_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) /* gpio1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) static struct resource omap16xx_gpio1_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .start = OMAP1610_GPIO1_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .end = OMAP1610_GPIO1_BASE + SZ_2K - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .start = INT_GPIO_BANK1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .revision = OMAP1610_GPIO_REVISION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .direction = OMAP1610_GPIO_DIRECTION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .set_dataout = OMAP1610_GPIO_SET_DATAOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .clr_dataout = OMAP1610_GPIO_CLEAR_DATAOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .datain = OMAP1610_GPIO_DATAIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .dataout = OMAP1610_GPIO_DATAOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .irqstatus = OMAP1610_GPIO_IRQSTATUS1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .irqenable = OMAP1610_GPIO_IRQENABLE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .wkup_en = OMAP1610_GPIO_WAKEUPENABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .edgectrl1 = OMAP1610_GPIO_EDGE_CTRL1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .edgectrl2 = OMAP1610_GPIO_EDGE_CTRL2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static struct omap_gpio_platform_data omap16xx_gpio1_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .bank_width = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .regs = &omap16xx_gpio_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static struct platform_device omap16xx_gpio1 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .name = "omap_gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .platform_data = &omap16xx_gpio1_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .num_resources = ARRAY_SIZE(omap16xx_gpio1_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .resource = omap16xx_gpio1_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) /* gpio2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static struct resource omap16xx_gpio2_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .start = OMAP1610_GPIO2_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .end = OMAP1610_GPIO2_BASE + SZ_2K - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .start = INT_1610_GPIO_BANK2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static struct omap_gpio_platform_data omap16xx_gpio2_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .bank_width = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .regs = &omap16xx_gpio_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static struct platform_device omap16xx_gpio2 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) .name = "omap_gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) .id = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) .platform_data = &omap16xx_gpio2_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) .num_resources = ARRAY_SIZE(omap16xx_gpio2_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) .resource = omap16xx_gpio2_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) /* gpio3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) static struct resource omap16xx_gpio3_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .start = OMAP1610_GPIO3_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) .end = OMAP1610_GPIO3_BASE + SZ_2K - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .start = INT_1610_GPIO_BANK3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static struct omap_gpio_platform_data omap16xx_gpio3_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .bank_width = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .regs = &omap16xx_gpio_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) static struct platform_device omap16xx_gpio3 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) .name = "omap_gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) .id = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) .platform_data = &omap16xx_gpio3_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) .num_resources = ARRAY_SIZE(omap16xx_gpio3_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) .resource = omap16xx_gpio3_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) /* gpio4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) static struct resource omap16xx_gpio4_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) .start = OMAP1610_GPIO4_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) .end = OMAP1610_GPIO4_BASE + SZ_2K - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) .start = INT_1610_GPIO_BANK4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) static struct omap_gpio_platform_data omap16xx_gpio4_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) .bank_width = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) .regs = &omap16xx_gpio_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) static struct platform_device omap16xx_gpio4 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) .name = "omap_gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) .id = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) .platform_data = &omap16xx_gpio4_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) .num_resources = ARRAY_SIZE(omap16xx_gpio4_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) .resource = omap16xx_gpio4_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) static struct platform_device *omap16xx_gpio_dev[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) &omap16xx_mpu_gpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) &omap16xx_gpio1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) &omap16xx_gpio2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) &omap16xx_gpio3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) &omap16xx_gpio4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) * omap16xx_gpio_init needs to be done before
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) * machine_init functions access gpio APIs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) * Hence omap16xx_gpio_init is a postcore_initcall.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) static int __init omap16xx_gpio_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) struct platform_device *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) struct omap_gpio_platform_data *pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) if (!cpu_is_omap16xx())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) * Enable system clock for GPIO module.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) * The CAM_CLK_CTRL *is* really the right place.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) ULPD_CAM_CLK_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) pdev = omap16xx_gpio_dev[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) pdata = pdev->dev.platform_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) if (unlikely(!res)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) dev_err(&pdev->dev, "Invalid mem resource.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) base = ioremap(res->start, resource_size(res));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) if (unlikely(!base)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) dev_err(&pdev->dev, "ioremap failed.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) __raw_writel(SYSCONFIG_WORD, base + OMAP1610_GPIO_SYSCONFIG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) iounmap(base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) platform_device_register(omap16xx_gpio_dev[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) postcore_initcall(omap16xx_gpio_init);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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