^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * OMAP15xx specific gpio init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Charulatha V <charu@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * This program is free software; you can redistribute it and/or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * modify it under the terms of the GNU General Public License as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * published by the Free Software Foundation version 2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * This program is distributed "as is" WITHOUT ANY WARRANTY of any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * kind, whether express or implied; without even the implied warranty
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * GNU General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/platform_data/gpio-omap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <mach/irqs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define OMAP1510_GPIO_BASE 0xFFFCE000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) /* gpio1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static struct resource omap15xx_mpu_gpio_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) .start = OMAP1_MPUIO_VBASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) .end = OMAP1_MPUIO_VBASE + SZ_2K - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) .start = INT_MPUIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .revision = USHRT_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .direction = OMAP_MPUIO_IO_CNTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .datain = OMAP_MPUIO_INPUT_LATCH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .dataout = OMAP_MPUIO_OUTPUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .irqstatus = OMAP_MPUIO_GPIO_INT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .irqenable = OMAP_MPUIO_GPIO_MASKIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .irqenable_inv = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static struct omap_gpio_platform_data omap15xx_mpu_gpio_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .is_mpuio = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .bank_width = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .bank_stride = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .regs = &omap15xx_mpuio_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static struct platform_device omap15xx_mpu_gpio = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .name = "omap_gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .platform_data = &omap15xx_mpu_gpio_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .num_resources = ARRAY_SIZE(omap15xx_mpu_gpio_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .resource = omap15xx_mpu_gpio_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /* gpio2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) static struct resource omap15xx_gpio_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .start = OMAP1510_GPIO_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .end = OMAP1510_GPIO_BASE + SZ_2K - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .start = INT_GPIO_BANK1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .revision = USHRT_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .direction = OMAP1510_GPIO_DIR_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .datain = OMAP1510_GPIO_DATA_INPUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .dataout = OMAP1510_GPIO_DATA_OUTPUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .irqstatus = OMAP1510_GPIO_INT_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .irqenable = OMAP1510_GPIO_INT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .irqenable_inv = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .irqctrl = OMAP1510_GPIO_INT_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .pinctrl = OMAP1510_GPIO_PIN_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) static struct omap_gpio_platform_data omap15xx_gpio_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .bank_width = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .regs = &omap15xx_gpio_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static struct platform_device omap15xx_gpio = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .name = "omap_gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .platform_data = &omap15xx_gpio_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) .num_resources = ARRAY_SIZE(omap15xx_gpio_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .resource = omap15xx_gpio_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * omap15xx_gpio_init needs to be done before
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * machine_init functions access gpio APIs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * Hence omap15xx_gpio_init is a postcore_initcall.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) static int __init omap15xx_gpio_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) if (!cpu_is_omap15xx())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) platform_device_register(&omap15xx_mpu_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) platform_device_register(&omap15xx_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) postcore_initcall(omap15xx_gpio_init);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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