Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * arch/arm/mach-omap1/ams-delta-fiq.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * Taken from the original Amstrad modifications to fiq.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * Copyright (c) 2004 Amstrad Plc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  * Copyright (c) 2006 Matt Callow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  * Copyright (c) 2010 Janusz Krzysztofik
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  * This program is free software; you can redistribute it and/or modify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)  * it under the terms of the GNU General Public License version 2 as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)  * published by the Free Software Foundation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #ifndef __AMS_DELTA_FIQ_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define __AMS_DELTA_FIQ_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <mach/irqs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)  * Interrupt number used for passing control from FIQ to IRQ.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)  * IRQ12, described as reserved, has been selected.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define INT_DEFERRED_FIQ	INT_1510_RES12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)  * Base address of an interrupt handler that the INT_DEFERRED_FIQ belongs to.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #if (INT_DEFERRED_FIQ < IH2_BASE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define DEFERRED_FIQ_IH_BASE	OMAP_IH1_BASE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define DEFERRED_FIQ_IH_BASE	OMAP_IH2_BASE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #ifndef __ASSEMBLER__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) extern unsigned char qwerty_fiqin_start, qwerty_fiqin_end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) extern void __init ams_delta_init_fiq(struct gpio_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 				      struct platform_device *pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #endif