Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *	linux/arch/arm/mach-nspire/nspire.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *	Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/irqchip.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/irqchip/arm-vic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/clkdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/amba/bus.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include "mmio.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) static const char *const nspire_dt_match[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	"ti,nspire",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	"ti,nspire-cx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	"ti,nspire-tp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	"ti,nspire-clp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static void nspire_restart(enum reboot_mode mode, const char *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	void __iomem *base = ioremap(NSPIRE_MISC_PHYS_BASE, SZ_4K);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	if (!base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	writel(2, base + NSPIRE_MISC_HWRESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) DT_MACHINE_START(NSPIRE, "TI-NSPIRE")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	.dt_compat	= nspire_dt_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	.restart	= nspire_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) MACHINE_END