^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright STMicroelectronics, 2007.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/amba/bus.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <asm/mach/time.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <asm/cacheflush.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <asm/hardware/cache-l2x0.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * These are the only hard-coded address offsets we still have to use.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define NOMADIK_FSMC_BASE 0x10100000 /* FSMC registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define NOMADIK_SDRAMC_BASE 0x10110000 /* SDRAM Controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define NOMADIK_CLCDC_BASE 0x10120000 /* CLCD Controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define NOMADIK_MDIF_BASE 0x10120000 /* MDIF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define NOMADIK_DMA0_BASE 0x10130000 /* DMA0 Controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define NOMADIK_IC_BASE 0x10140000 /* Vectored Irq Controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define NOMADIK_DMA1_BASE 0x10150000 /* DMA1 Controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define NOMADIK_USB_BASE 0x10170000 /* USB-OTG conf reg base */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define NOMADIK_CRYP_BASE 0x10180000 /* Crypto processor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define NOMADIK_SHA1_BASE 0x10190000 /* SHA-1 Processor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define NOMADIK_XTI_BASE 0x101A0000 /* XTI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define NOMADIK_RNG_BASE 0x101B0000 /* Random number generator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define NOMADIK_SRC_BASE 0x101E0000 /* SRC base */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define NOMADIK_WDOG_BASE 0x101E1000 /* Watchdog */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define NOMADIK_MTU0_BASE 0x101E2000 /* Multiple Timer 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define NOMADIK_MTU1_BASE 0x101E3000 /* Multiple Timer 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define NOMADIK_GPIO0_BASE 0x101E4000 /* GPIO0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define NOMADIK_GPIO1_BASE 0x101E5000 /* GPIO1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define NOMADIK_GPIO2_BASE 0x101E6000 /* GPIO2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define NOMADIK_GPIO3_BASE 0x101E7000 /* GPIO3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define NOMADIK_RTC_BASE 0x101E8000 /* Real Time Clock base */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define NOMADIK_PMU_BASE 0x101E9000 /* Power Management Unit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define NOMADIK_OWM_BASE 0x101EA000 /* One wire master */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define NOMADIK_SCR_BASE 0x101EF000 /* Secure Control registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define NOMADIK_MSP2_BASE 0x101F0000 /* MSP 2 interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define NOMADIK_MSP1_BASE 0x101F1000 /* MSP 1 interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define NOMADIK_UART2_BASE 0x101F2000 /* UART 2 interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define NOMADIK_SSIRx_BASE 0x101F3000 /* SSI 8-ch rx interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define NOMADIK_SSITx_BASE 0x101F4000 /* SSI 8-ch tx interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define NOMADIK_MSHC_BASE 0x101F5000 /* Memory Stick(Pro) Host */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define NOMADIK_SDI_BASE 0x101F6000 /* SD-card/MM-Card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define NOMADIK_I2C1_BASE 0x101F7000 /* I2C1 interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define NOMADIK_I2C0_BASE 0x101F8000 /* I2C0 interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define NOMADIK_MSP0_BASE 0x101F9000 /* MSP 0 interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define NOMADIK_FIRDA_BASE 0x101FA000 /* FIrDA interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define NOMADIK_UART1_BASE 0x101FB000 /* UART 1 interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define NOMADIK_SSP_BASE 0x101FC000 /* SSP interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define NOMADIK_UART0_BASE 0x101FD000 /* UART 0 interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define NOMADIK_SGA_BASE 0x101FE000 /* SGA interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define NOMADIK_L2CC_BASE 0x10210000 /* L2 Cache controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define NOMADIK_UART1_VBASE 0xF01FB000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /* This is needed for LL-debug/earlyprintk/debug-macro.S */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) static struct map_desc cpu8815_io_desc[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .virtual = NOMADIK_UART1_VBASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .pfn = __phys_to_pfn(NOMADIK_UART1_BASE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .length = SZ_4K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .type = MT_DEVICE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static void __init cpu8815_map_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) iotable_init(cpu8815_io_desc, ARRAY_SIZE(cpu8815_io_desc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static void cpu8815_restart(enum reboot_mode mode, const char *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) void __iomem *srcbase = ioremap(NOMADIK_SRC_BASE, SZ_4K);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) /* FIXME: use egpio when implemented */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) /* Write anything to Reset status register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) writel(1, srcbase + 0x18);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) static const char * cpu8815_board_compat[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) "st,nomadik-nhk-15",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) "calaosystems,usb-s8815",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) DT_MACHINE_START(NOMADIK_DT, "Nomadik STn8815")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) .l2c_aux_val = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .l2c_aux_mask = ~0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .map_io = cpu8815_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .restart = cpu8815_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .dt_compat = cpu8815_board_compat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) MACHINE_END
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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