^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Power Management Service Unit (PMSU) support for Armada 370/XP platforms.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2012 Marvell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * This file is licensed under the terms of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * License version 2. This program is licensed "as is" without any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * warranty of any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #ifndef __MACH_MVEBU_PMSU_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define __MACH_MVEBU_PMSU_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) int armada_xp_boot_cpu(unsigned int cpu_id, void *phys_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) int mvebu_setup_boot_addr_wa(unsigned int crypto_eng_target,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) unsigned int crypto_eng_attribute,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) phys_addr_t resume_addr_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) void mvebu_v7_pmsu_idle_exit(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) void armada_370_xp_cpu_resume(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) int armada_370_xp_pmsu_idle_enter(unsigned long deepidle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) int armada_38x_do_cpu_suspend(unsigned long deepidle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #endif /* __MACH_370_XP_PMSU_H */