Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2)  * Marvell EBU SoC ID and revision definitions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * Copyright (C) 2014 Marvell Semiconductor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * This file is licensed under the terms of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * License version 2.  This program is licensed "as is" without any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * warranty of any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #ifndef __LINUX_MVEBU_SOC_ID_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define __LINUX_MVEBU_SOC_ID_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) /* Armada XP ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define MV78230_DEV_ID	    0x7823
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define MV78260_DEV_ID	    0x7826
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define MV78460_DEV_ID	    0x7846
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /* Armada XP Revision */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define MV78XX0_A0_REV	    0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define MV78XX0_B0_REV	    0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /* Amada 370 ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define ARMADA_370_DEV_ID   0x6710
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) /* Amada 370 Revision */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define ARMADA_370_A1_REV   0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /* Armada 375 ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define ARMADA_375_DEV_ID   0x6720
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /* Armada 375 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define ARMADA_375_Z1_REV   0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define ARMADA_375_A0_REV   0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /* Armada 38x ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define ARMADA_380_DEV_ID   0x6810
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define ARMADA_385_DEV_ID   0x6820
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define ARMADA_388_DEV_ID   0x6828
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /* Armada 38x Revision */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define ARMADA_38x_Z1_REV   0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define ARMADA_38x_A0_REV   0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #ifdef CONFIG_ARCH_MVEBU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) int mvebu_get_soc_id(u32 *dev, u32 *rev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) static inline int mvebu_get_soc_id(u32 *dev, u32 *rev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #endif /* __LINUX_MVEBU_SOC_ID_H */