^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * arch/arm/mach-mvebu/kirkwood.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Generic definitions for Marvell Kirkwood SoC flavors:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * 88F6180, 88F6192 and 88F6281.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * This file is licensed under the terms of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * License version 2. This program is licensed "as is" without any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * warranty of any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define KIRKWOOD_REGS_PHYS_BASE 0xf1000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define DDR_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x00000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define BRIDGE_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE + 0x20000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define DDR_OPERATION_BASE (DDR_PHYS_BASE + 0x1418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define CPU_CONFIG_PHYS (BRIDGE_PHYS_BASE + 0x0100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define CPU_CONFIG_ERROR_PROP 0x00000004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define CPU_CONTROL_PHYS (BRIDGE_PHYS_BASE + 0x0104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define MEMORY_PM_CTRL_PHYS (BRIDGE_PHYS_BASE + 0x0118)