^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * arch/arm/mach-mv78x00/rd78x00-masa-setup.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Marvell RD-78x00-mASA Development Board Setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * This file is licensed under the terms of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * License version 2. This program is licensed "as is" without any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * warranty of any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/ata_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/mv643xx_eth.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/ethtool.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include "mv78xx0.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include "common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) static struct mv643xx_eth_platform_data rd78x00_masa_ge00_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) .phy_addr = MV643XX_ETH_PHY_ADDR(8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) static struct mv643xx_eth_platform_data rd78x00_masa_ge01_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) .phy_addr = MV643XX_ETH_PHY_ADDR(9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static struct mv643xx_eth_platform_data rd78x00_masa_ge10_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) static struct mv643xx_eth_platform_data rd78x00_masa_ge11_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static struct mv_sata_platform_data rd78x00_masa_sata_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) .n_ports = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static void __init rd78x00_masa_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * Basic MV78x00 setup. Needs to be called early.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) mv78xx0_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * Partition on-chip peripherals between the two CPU cores.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) if (mv78xx0_core_index() == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) mv78xx0_ehci0_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) mv78xx0_ehci1_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) mv78xx0_ge00_init(&rd78x00_masa_ge00_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) mv78xx0_ge10_init(&rd78x00_masa_ge10_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) mv78xx0_sata_init(&rd78x00_masa_sata_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) mv78xx0_uart0_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) mv78xx0_uart2_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) mv78xx0_ehci2_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) mv78xx0_ge01_init(&rd78x00_masa_ge01_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) mv78xx0_ge11_init(&rd78x00_masa_ge11_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) mv78xx0_uart1_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) mv78xx0_uart3_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static int __init rd78x00_pci_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * Assign all PCIe devices to CPU core #0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) if (machine_is_rd78x00_masa() && mv78xx0_core_index() == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) mv78xx0_pcie_init(1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) subsys_initcall(rd78x00_pci_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) MACHINE_START(RD78X00_MASA, "Marvell RD-78x00-MASA Development Board")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .atag_offset = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .nr_irqs = MV78XX0_NR_IRQS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .init_machine = rd78x00_masa_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .map_io = mv78xx0_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .init_early = mv78xx0_init_early,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .init_irq = mv78xx0_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .init_time = mv78xx0_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .restart = mv78xx0_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) MACHINE_END
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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