^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * arch/arm/mach-mv78xx0/common.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Core functions for Marvell MV78xx0 SoCs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * This file is licensed under the terms of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * License version 2. This program is licensed "as is" without any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * warranty of any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #ifndef __ARCH_MV78XX0_COMMON_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define __ARCH_MV78XX0_COMMON_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/reboot.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) struct mv643xx_eth_platform_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) struct mv_sata_platform_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * Basic MV78xx0 init functions used early by machine-setup.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) int mv78xx0_core_index(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) void mv78xx0_map_io(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) void mv78xx0_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) void mv78xx0_init_early(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) void mv78xx0_init_irq(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) void mv78xx0_setup_cpu_mbus(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) void mv78xx0_setup_pcie_io_win(int window, u32 base, u32 size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) int maj, int min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) void mv78xx0_setup_pcie_mem_win(int window, u32 base, u32 size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) int maj, int min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) void mv78xx0_pcie_id(u32 *dev, u32 *rev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) void mv78xx0_ehci0_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) void mv78xx0_ehci1_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) void mv78xx0_ehci2_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) void mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) void mv78xx0_ge01_init(struct mv643xx_eth_platform_data *eth_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) void mv78xx0_ge10_init(struct mv643xx_eth_platform_data *eth_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) void mv78xx0_ge11_init(struct mv643xx_eth_platform_data *eth_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) void mv78xx0_pcie_init(int init_port0, int init_port1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) void mv78xx0_sata_init(struct mv_sata_platform_data *sata_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) void mv78xx0_uart0_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) void mv78xx0_uart1_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) void mv78xx0_uart2_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) void mv78xx0_uart3_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) void mv78xx0_i2c_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) void mv78xx0_restart(enum reboot_mode, const char *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) extern void mv78xx0_timer_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #endif