^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * linux/arch/arm/mach-mmp/sram.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * based on mach-davinci/sram.c - DaVinci simple SRAM allocator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (c) 2011 Marvell Semiconductors Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * All Rights Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Add for mmp sram support - Leo Yan <leoy@marvell.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/mod_devicetable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/genalloc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/platform_data/dma-mmp_tdma.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct sram_bank_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) char *pool_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct gen_pool *gpool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) int granularity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) phys_addr_t sram_phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) void __iomem *sram_virt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) u32 sram_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct list_head node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static DEFINE_MUTEX(sram_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) static LIST_HEAD(sram_bank_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct gen_pool *sram_get_gpool(char *pool_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct sram_bank_info *info = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) if (!pool_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) mutex_lock(&sram_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) list_for_each_entry(info, &sram_bank_list, node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) if (!strcmp(pool_name, info->pool_name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) mutex_unlock(&sram_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) if (&info->node == &sram_bank_list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) return info->gpool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) EXPORT_SYMBOL(sram_get_gpool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static int sram_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) struct sram_platdata *pdata = pdev->dev.platform_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) struct sram_bank_info *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) if (!pdata || !pdata->pool_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) info = kzalloc(sizeof(*info), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) if (!info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) platform_set_drvdata(pdev, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) if (res == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) dev_err(&pdev->dev, "no memory resource defined\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) ret = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) if (!resource_size(res))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) info->sram_phys = (phys_addr_t)res->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) info->sram_size = resource_size(res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) info->sram_virt = ioremap(info->sram_phys, info->sram_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) info->pool_name = kstrdup(pdata->pool_name, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) info->granularity = pdata->granularity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) info->gpool = gen_pool_create(ilog2(info->granularity), -1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) if (!info->gpool) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) dev_err(&pdev->dev, "create pool failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) goto create_pool_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) ret = gen_pool_add_virt(info->gpool, (unsigned long)info->sram_virt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) info->sram_phys, info->sram_size, -1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) dev_err(&pdev->dev, "add new chunk failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) goto add_chunk_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) mutex_lock(&sram_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) list_add(&info->node, &sram_bank_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) mutex_unlock(&sram_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) dev_info(&pdev->dev, "initialized\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) add_chunk_err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) gen_pool_destroy(info->gpool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) create_pool_err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) iounmap(info->sram_virt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) kfree(info->pool_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) kfree(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static int sram_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) struct sram_bank_info *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) info = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) if (info->sram_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) mutex_lock(&sram_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) list_del(&info->node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) mutex_unlock(&sram_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) gen_pool_destroy(info->gpool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) iounmap(info->sram_virt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) kfree(info->pool_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) kfree(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static const struct platform_device_id sram_id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) { "asram", MMP_ASRAM },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) { "isram", MMP_ISRAM },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) static struct platform_driver sram_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) .probe = sram_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) .remove = sram_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .name = "mmp-sram",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) .id_table = sram_id_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static int __init sram_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) return platform_driver_register(&sram_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) core_initcall(sram_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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