^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Application Peripheral Bus Clock Unit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #ifndef __ASM_MACH_REGS_APBC_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define __ASM_MACH_REGS_APBC_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include "addr-map.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) /* Common APB clock register bit definitions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define APBC_APBCLK (1 << 0) /* APB Bus Clock Enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define APBC_FNCLK (1 << 1) /* Functional Clock Enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define APBC_RST (1 << 2) /* Reset Generation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) /* Functional Clock Selection Mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define APBC_FNCLKSEL(x) (((x) & 0xf) << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #endif /* __ASM_MACH_REGS_APBC_H */