Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) #ifndef __ASM_MACH_MFP_PXA910_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) #define __ASM_MACH_MFP_PXA910_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) #include "mfp.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #define MFP_DRIVE_VERY_SLOW	(0x0 << 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #define MFP_DRIVE_SLOW		(0x2 << 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #define MFP_DRIVE_MEDIUM	(0x4 << 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #define MFP_DRIVE_FAST		(0x6 << 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) /* UART2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #define GPIO47_UART2_RXD	MFP_CFG(GPIO47, AF6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #define GPIO48_UART2_TXD	MFP_CFG(GPIO48, AF6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) /* UART3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #define GPIO31_UART3_RXD	MFP_CFG(GPIO31, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #define GPIO32_UART3_TXD	MFP_CFG(GPIO32, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) /*IRDA*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define GPIO51_IRDA_SHDN	MFP_CFG(GPIO51, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) /* SMC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define SM_nCS0_nCS0		MFP_CFG(SM_nCS0, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define SM_ADV_SM_ADV		MFP_CFG(SM_ADV, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define SM_SCLK_SM_SCLK		MFP_CFG(SM_SCLK, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define SM_BE0_SM_BE0		MFP_CFG(SM_BE0, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define SM_BE1_SM_BE1		MFP_CFG(SM_BE1, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) /* I2C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define GPIO53_CI2C_SCL		MFP_CFG(GPIO53, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define GPIO54_CI2C_SDA		MFP_CFG(GPIO54, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) /* SSP1 (I2S) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define GPIO24_SSP1_SDATA_IN	MFP_CFG_DRV(GPIO24, AF1, MEDIUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define GPIO21_SSP1_BITCLK	MFP_CFG_DRV(GPIO21, AF1, MEDIUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define GPIO20_SSP1_SYSCLK	MFP_CFG_DRV(GPIO20, AF1, MEDIUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define GPIO22_SSP1_SYNC	MFP_CFG_DRV(GPIO22, AF1, MEDIUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define GPIO23_SSP1_DATA_OUT	MFP_CFG_DRV(GPIO23, AF1, MEDIUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define GPIO124_MN_CLK_OUT	MFP_CFG_DRV(GPIO124, AF1, MEDIUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define GPIO123_CLK_REQ		MFP_CFG_DRV(GPIO123, AF0, MEDIUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) /* DFI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define DF_IO0_ND_IO0		MFP_CFG(DF_IO0, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define DF_IO1_ND_IO1		MFP_CFG(DF_IO1, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define DF_IO2_ND_IO2		MFP_CFG(DF_IO2, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define DF_IO3_ND_IO3		MFP_CFG(DF_IO3, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define DF_IO4_ND_IO4		MFP_CFG(DF_IO4, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define DF_IO5_ND_IO5		MFP_CFG(DF_IO5, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define DF_IO6_ND_IO6		MFP_CFG(DF_IO6, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define DF_IO7_ND_IO7		MFP_CFG(DF_IO7, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define DF_IO8_ND_IO8		MFP_CFG(DF_IO8, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define DF_IO9_ND_IO9		MFP_CFG(DF_IO9, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #define DF_IO10_ND_IO10		MFP_CFG(DF_IO10, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) #define DF_IO11_ND_IO11		MFP_CFG(DF_IO11, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) #define DF_IO12_ND_IO12		MFP_CFG(DF_IO12, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) #define DF_IO13_ND_IO13		MFP_CFG(DF_IO13, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) #define DF_IO14_ND_IO14		MFP_CFG(DF_IO14, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) #define DF_IO15_ND_IO15		MFP_CFG(DF_IO15, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) #define DF_nCS0_SM_nCS2_nCS0	MFP_CFG(DF_nCS0_SM_nCS2, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) #define DF_ALE_SM_WEn_ND_ALE	MFP_CFG(DF_ALE_SM_WEn, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) #define DF_CLE_SM_OEn_ND_CLE	MFP_CFG(DF_CLE_SM_OEn, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) #define DF_WEn_DF_WEn		MFP_CFG(DF_WEn, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) #define DF_REn_DF_REn		MFP_CFG(DF_REn, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) #define DF_RDY0_DF_RDY0		MFP_CFG(DF_RDY0, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) /*keypad*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) #define GPIO00_KP_MKIN0		MFP_CFG(GPIO0, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) #define GPIO01_KP_MKOUT0	MFP_CFG(GPIO1, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) #define GPIO02_KP_MKIN1		MFP_CFG(GPIO2, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) #define GPIO03_KP_MKOUT1	MFP_CFG(GPIO3, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) #define GPIO04_KP_MKIN2		MFP_CFG(GPIO4, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) #define GPIO05_KP_MKOUT2	MFP_CFG(GPIO5, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) #define GPIO06_KP_MKIN3		MFP_CFG(GPIO6, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) #define GPIO07_KP_MKOUT3	MFP_CFG(GPIO7, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) #define GPIO08_KP_MKIN4		MFP_CFG(GPIO8, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) #define GPIO09_KP_MKOUT4	MFP_CFG(GPIO9, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) #define GPIO10_KP_MKIN5		MFP_CFG(GPIO10, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) #define GPIO11_KP_MKOUT5	MFP_CFG(GPIO11, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) #define GPIO12_KP_MKIN6		MFP_CFG(GPIO12, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) #define GPIO13_KP_MKOUT6	MFP_CFG(GPIO13, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) #define GPIO14_KP_MKIN7		MFP_CFG(GPIO14, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) #define GPIO15_KP_MKOUT7	MFP_CFG(GPIO15, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) #define GPIO16_KP_DKIN0		MFP_CFG(GPIO16, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) #define GPIO17_KP_DKIN1		MFP_CFG(GPIO17, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) #define GPIO18_KP_DKIN2		MFP_CFG(GPIO18, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) #define GPIO19_KP_DKIN3		MFP_CFG(GPIO19, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) /* LCD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) #define GPIO81_LCD_FCLK		MFP_CFG(GPIO81, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) #define GPIO82_LCD_LCLK		MFP_CFG(GPIO82, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) #define GPIO83_LCD_PCLK		MFP_CFG(GPIO83, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) #define GPIO84_LCD_DENA		MFP_CFG(GPIO84, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) #define GPIO85_LCD_DD0		MFP_CFG(GPIO85, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) #define GPIO86_LCD_DD1		MFP_CFG(GPIO86, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) #define GPIO87_LCD_DD2		MFP_CFG(GPIO87, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) #define GPIO88_LCD_DD3		MFP_CFG(GPIO88, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) #define GPIO89_LCD_DD4		MFP_CFG(GPIO89, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) #define GPIO90_LCD_DD5		MFP_CFG(GPIO90, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define GPIO91_LCD_DD6		MFP_CFG(GPIO91, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define GPIO92_LCD_DD7		MFP_CFG(GPIO92, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define GPIO93_LCD_DD8		MFP_CFG(GPIO93, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define GPIO94_LCD_DD9		MFP_CFG(GPIO94, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define GPIO95_LCD_DD10		MFP_CFG(GPIO95, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define GPIO96_LCD_DD11		MFP_CFG(GPIO96, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define GPIO97_LCD_DD12		MFP_CFG(GPIO97, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define GPIO98_LCD_DD13		MFP_CFG(GPIO98, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define GPIO100_LCD_DD14	MFP_CFG(GPIO100, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define GPIO101_LCD_DD15	MFP_CFG(GPIO101, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define GPIO102_LCD_DD16	MFP_CFG(GPIO102, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define GPIO103_LCD_DD17	MFP_CFG(GPIO103, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define GPIO104_LCD_DD18	MFP_CFG(GPIO104, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define GPIO105_LCD_DD19	MFP_CFG(GPIO105, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define GPIO106_LCD_DD20	MFP_CFG(GPIO106, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define GPIO107_LCD_DD21	MFP_CFG(GPIO107, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define GPIO108_LCD_DD22	MFP_CFG(GPIO108, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define GPIO109_LCD_DD23	MFP_CFG(GPIO109, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define GPIO104_LCD_SPIDOUT	MFP_CFG(GPIO104, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define GPIO105_LCD_SPIDIN	MFP_CFG(GPIO105, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define GPIO107_LCD_CS1 	MFP_CFG(GPIO107, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define GPIO108_LCD_DCLK	MFP_CFG(GPIO108, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define GPIO106_LCD_RESET	MFP_CFG(GPIO106, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) /*smart panel*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define GPIO82_LCD_A0		MFP_CFG(GPIO82, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define GPIO83_LCD_WR		MFP_CFG(GPIO83, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #define GPIO103_LCD_CS		MFP_CFG(GPIO103, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) /*1wire*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define GPIO106_1WIRE		MFP_CFG(GPIO106, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) /*CCIC*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define GPIO67_CCIC_IN7		MFP_CFG_DRV(GPIO67, AF1, MEDIUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #define GPIO68_CCIC_IN6		MFP_CFG_DRV(GPIO68, AF1, MEDIUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #define GPIO69_CCIC_IN5		MFP_CFG_DRV(GPIO69, AF1, MEDIUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #define GPIO70_CCIC_IN4		MFP_CFG_DRV(GPIO70, AF1, MEDIUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #define GPIO71_CCIC_IN3		MFP_CFG_DRV(GPIO71, AF1, MEDIUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #define GPIO72_CCIC_IN2		MFP_CFG_DRV(GPIO72, AF1, MEDIUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) #define GPIO73_CCIC_IN1		MFP_CFG_DRV(GPIO73, AF1, MEDIUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define GPIO74_CCIC_IN0		MFP_CFG_DRV(GPIO74, AF1, MEDIUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) #define GPIO75_CAM_HSYNC	MFP_CFG_DRV(GPIO75, AF1, MEDIUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define GPIO76_CAM_VSYNC	MFP_CFG_DRV(GPIO76, AF1, MEDIUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define GPIO77_CAM_MCLK		MFP_CFG_DRV(GPIO77, AF1, MEDIUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define GPIO78_CAM_PCLK		MFP_CFG_DRV(GPIO78, AF1, MEDIUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) /* MMC1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define MMC1_DAT7_MMC1_DAT7	MFP_CFG_DRV(MMC1_DAT7, AF0, MEDIUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #define MMC1_DAT6_MMC1_DAT6	MFP_CFG_DRV(MMC1_DAT6, AF0, MEDIUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #define MMC1_DAT5_MMC1_DAT5	MFP_CFG_DRV(MMC1_DAT5, AF0, MEDIUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #define MMC1_DAT4_MMC1_DAT4	MFP_CFG_DRV(MMC1_DAT4, AF0, MEDIUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #define MMC1_DAT3_MMC1_DAT3	MFP_CFG_DRV(MMC1_DAT3, AF0, MEDIUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #define MMC1_DAT2_MMC1_DAT2	MFP_CFG_DRV(MMC1_DAT2, AF0, MEDIUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #define MMC1_DAT1_MMC1_DAT1	MFP_CFG_DRV(MMC1_DAT1, AF0, MEDIUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #define MMC1_DAT0_MMC1_DAT0	MFP_CFG_DRV(MMC1_DAT0, AF0, MEDIUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) #define MMC1_CMD_MMC1_CMD	MFP_CFG_DRV(MMC1_CMD, AF0, MEDIUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #define MMC1_CLK_MMC1_CLK	MFP_CFG_DRV(MMC1_CLK, AF0, MEDIUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #define MMC1_CD_MMC1_CD		MFP_CFG_DRV(MMC1_CD, AF0, MEDIUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #define MMC1_WP_MMC1_WP		MFP_CFG_DRV(MMC1_WP, AF0, MEDIUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) /* PWM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #define GPIO27_PWM3_AF2		MFP_CFG(GPIO27, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #define GPIO51_PWM2_OUT		MFP_CFG(GPIO51, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #define GPIO117_PWM1_OUT	MFP_CFG(GPIO117, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #define GPIO118_PWM2_OUT	MFP_CFG(GPIO118, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #define GPIO119_PWM3_OUT	MFP_CFG(GPIO119, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) #define GPIO120_PWM4_OUT	MFP_CFG(GPIO120, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) #endif /* __ASM_MACH MFP_PXA910_H */