^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * linux/arch/arm/mach-mmp/jasper.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Support for the Marvell Jasper Development Platform.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2009-2010 Marvell International Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/gpio-pxa.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/regulator/max8649.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/mfd/max8925.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include "irqs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include "addr-map.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include "mfp-mmp2.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include "mmp2.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include "common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define JASPER_NR_IRQS (MMP_NR_IRQS + 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static unsigned long jasper_pin_config[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /* UART1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) GPIO29_UART1_RXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) GPIO30_UART1_TXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /* UART3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) GPIO51_UART3_RXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) GPIO52_UART3_TXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /* DFI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) GPIO168_DFI_D0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) GPIO167_DFI_D1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) GPIO166_DFI_D2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) GPIO165_DFI_D3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) GPIO107_DFI_D4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) GPIO106_DFI_D5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) GPIO105_DFI_D6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) GPIO104_DFI_D7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) GPIO111_DFI_D8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) GPIO164_DFI_D9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) GPIO163_DFI_D10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) GPIO162_DFI_D11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) GPIO161_DFI_D12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) GPIO110_DFI_D13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) GPIO109_DFI_D14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) GPIO108_DFI_D15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) GPIO143_ND_nCS0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) GPIO144_ND_nCS1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) GPIO147_ND_nWE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) GPIO148_ND_nRE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) GPIO150_ND_ALE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) GPIO149_ND_CLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) GPIO112_ND_RDY0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) GPIO160_ND_RDY1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) /* PMIC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) PMIC_PMIC_INT | MFP_LPM_EDGE_FALL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) /* MMC1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) GPIO131_MMC1_DAT3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) GPIO132_MMC1_DAT2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) GPIO133_MMC1_DAT1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) GPIO134_MMC1_DAT0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) GPIO136_MMC1_CMD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) GPIO139_MMC1_CLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) GPIO140_MMC1_CD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) GPIO141_MMC1_WP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /* MMC2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) GPIO37_MMC2_DAT3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) GPIO38_MMC2_DAT2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) GPIO39_MMC2_DAT1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) GPIO40_MMC2_DAT0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) GPIO41_MMC2_CMD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) GPIO42_MMC2_CLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* MMC3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) GPIO165_MMC3_DAT7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) GPIO162_MMC3_DAT6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) GPIO166_MMC3_DAT5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) GPIO163_MMC3_DAT4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) GPIO167_MMC3_DAT3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) GPIO164_MMC3_DAT2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) GPIO168_MMC3_DAT1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) GPIO111_MMC3_DAT0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) GPIO112_MMC3_CMD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) GPIO151_MMC3_CLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static struct pxa_gpio_platform_data mmp2_gpio_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .irq_base = MMP_GPIO_TO_IRQ(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static struct regulator_consumer_supply max8649_supply[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) REGULATOR_SUPPLY("vcc_core", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static struct regulator_init_data max8649_init_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .name = "vcc_core range",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .min_uV = 1150000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .max_uV = 1280000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) .always_on = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .boot_on = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .num_consumer_supplies = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .consumer_supplies = &max8649_supply[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static struct max8649_platform_data jasper_max8649_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .mode = 2, /* VID1 = 1, VID0 = 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .extclk = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .ramp_timing = MAX8649_RAMP_32MV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .regulator = &max8649_init_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static struct max8925_backlight_pdata jasper_backlight_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .dual_string = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static struct max8925_power_pdata jasper_power_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .batt_detect = 0, /* can't detect battery by ID pin */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .topoff_threshold = MAX8925_TOPOFF_THR_10PER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .fast_charge = MAX8925_FCHG_1000MA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static struct max8925_platform_data jasper_max8925_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) .backlight = &jasper_backlight_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) .power = &jasper_power_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) .irq_base = MMP_NR_IRQS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static struct i2c_board_info jasper_twsi1_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) .type = "max8649",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .addr = 0x60,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .platform_data = &jasper_max8649_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .type = "max8925",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) .addr = 0x3c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) .irq = IRQ_MMP2_PMIC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) .platform_data = &jasper_max8925_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) static struct sdhci_pxa_platdata mmp2_sdh_platdata_mmc0 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) .clk_delay_cycles = 0x1f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static void __init jasper_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) mfp_config(ARRAY_AND_SIZE(jasper_pin_config));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) /* on-chip devices */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) mmp2_add_uart(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) mmp2_add_uart(3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(jasper_twsi1_info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) platform_device_add_data(&mmp2_device_gpio, &mmp2_gpio_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) sizeof(struct pxa_gpio_platform_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) platform_device_register(&mmp2_device_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) mmp2_add_sdhost(0, &mmp2_sdh_platdata_mmc0); /* SD/MMC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) regulator_has_full_constraints();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) MACHINE_START(MARVELL_JASPER, "Jasper Development Platform")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) .map_io = mmp_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) .nr_irqs = JASPER_NR_IRQS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) .init_irq = mmp2_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) .init_time = mmp2_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) .init_machine = jasper_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) .restart = mmp_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) MACHINE_END
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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