^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * linux/arch/arm/mach-mmp/gplugd.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Support for the Marvell PXA168-based GuruPlug Display (gplugD) Platform.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/gpio-pxa.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include "irqs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include "pxa168.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include "mfp-pxa168.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include "common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) static unsigned long gplugd_pin_config[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /* UART3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) GPIO8_UART3_TXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) GPIO9_UART3_RXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) GPIO1O_UART3_CTS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) GPIO11_UART3_RTS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /* USB OTG PEN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) GPIO18_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /* MMC2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) GPIO28_MMC2_CMD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) GPIO29_MMC2_CLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) GPIO30_MMC2_DAT0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) GPIO31_MMC2_DAT1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) GPIO32_MMC2_DAT2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) GPIO33_MMC2_DAT3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /* LCD & HDMI clock selection GPIO: 0: 74.176MHz, 1: 74.25 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) GPIO35_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) GPIO36_GPIO, /* CEC Interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /* MMC1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) GPIO43_MMC1_CLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) GPIO49_MMC1_CMD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) GPIO41_MMC1_DAT0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) GPIO40_MMC1_DAT1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) GPIO52_MMC1_DAT2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) GPIO51_MMC1_DAT3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) GPIO53_MMC1_CD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) /* LCD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) GPIO56_LCD_FCLK_RD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) GPIO57_LCD_LCLK_A0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) GPIO58_LCD_PCLK_WR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) GPIO59_LCD_DENA_BIAS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) GPIO60_LCD_DD0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) GPIO61_LCD_DD1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) GPIO62_LCD_DD2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) GPIO63_LCD_DD3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) GPIO64_LCD_DD4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) GPIO65_LCD_DD5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) GPIO66_LCD_DD6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) GPIO67_LCD_DD7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) GPIO68_LCD_DD8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) GPIO69_LCD_DD9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) GPIO70_LCD_DD10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) GPIO71_LCD_DD11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) GPIO72_LCD_DD12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) GPIO73_LCD_DD13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) GPIO74_LCD_DD14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) GPIO75_LCD_DD15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) GPIO76_LCD_DD16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) GPIO77_LCD_DD17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) GPIO78_LCD_DD18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) GPIO79_LCD_DD19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) GPIO80_LCD_DD20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) GPIO81_LCD_DD21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) GPIO82_LCD_DD22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) GPIO83_LCD_DD23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /* GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) GPIO84_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) GPIO85_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* Fast-Ethernet*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) GPIO86_TX_CLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) GPIO87_TX_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) GPIO88_TX_DQ3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) GPIO89_TX_DQ2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) GPIO90_TX_DQ1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) GPIO91_TX_DQ0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) GPIO92_MII_CRS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) GPIO93_MII_COL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) GPIO94_RX_CLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) GPIO95_RX_ER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) GPIO96_RX_DQ3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) GPIO97_RX_DQ2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) GPIO98_RX_DQ1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) GPIO99_RX_DQ0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) GPIO100_MII_MDC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) GPIO101_MII_MDIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) GPIO103_RX_DV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) GPIO104_GPIO, /* Reset PHY */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /* RTC interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) GPIO102_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /* I2C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) GPIO105_CI2C_SDA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) GPIO106_CI2C_SCL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) /* SPI NOR Flash on SSP2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) GPIO107_SSP2_RXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) GPIO108_SSP2_TXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) GPIO110_GPIO, /* SPI_CSn */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) GPIO111_SSP2_CLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) /* Select JTAG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) GPIO109_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) /* I2S */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) GPIO114_I2S_FRM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) GPIO115_I2S_BCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) GPIO116_I2S_TXD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static struct pxa_gpio_platform_data pxa168_gpio_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .irq_base = MMP_GPIO_TO_IRQ(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static struct i2c_board_info gplugd_i2c_board_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .type = "isl1208",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .addr = 0x6F,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) /* Bring PHY out of reset by setting GPIO 104 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static int gplugd_eth_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) if (unlikely(gpio_request(104, "ETH_RESET_N"))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) printk(KERN_ERR "Can't get hold of GPIO 104 to bring Ethernet "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) "PHY out of reset\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) gpio_direction_output(104, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) gpio_free(104);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) struct pxa168_eth_platform_data gplugd_eth_platform_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) .port_number = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .phy_addr = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) .speed = 0, /* Autonagotiation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) .intf = PHY_INTERFACE_MODE_RMII,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) .init = gplugd_eth_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static void __init select_disp_freq(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) /* set GPIO 35 & clear GPIO 85 to set LCD External Clock to 74.25 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) if (unlikely(gpio_request(35, "DISP_FREQ_SEL"))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) printk(KERN_ERR "Can't get hold of GPIO 35 to select display "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) "frequency\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) gpio_direction_output(35, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) gpio_free(35);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) if (unlikely(gpio_request(85, "DISP_FREQ_SEL_2"))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) printk(KERN_ERR "Can't get hold of GPIO 85 to select display "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) "frequency\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) gpio_direction_output(85, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) gpio_free(85);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static void __init gplugd_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) mfp_config(ARRAY_AND_SIZE(gplugd_pin_config));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) select_disp_freq();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) /* on-chip devices */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) pxa168_add_uart(3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) pxa168_add_ssp(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(gplugd_i2c_board_info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) platform_device_add_data(&pxa168_device_gpio, &pxa168_gpio_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) sizeof(struct pxa_gpio_platform_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) platform_device_register(&pxa168_device_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) pxa168_add_eth(&gplugd_eth_platform_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) MACHINE_START(GPLUGD, "PXA168-based GuruPlug Display (gplugD) Platform")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) .map_io = mmp_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) .nr_irqs = MMP_NR_IRQS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) .init_irq = pxa168_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) .init_time = pxa168_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) .init_machine = gplugd_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) .restart = pxa168_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) MACHINE_END