^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * arch/arm/mach-lpc32xx/common.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Author: Kevin Wells <kevin.wells@nxp.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2010 NXP Semiconductors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/soc/nxp/lpc32xx-misc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/system_info.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include "lpc32xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include "common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * Returns the unique ID for the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) void lpc32xx_get_uid(u32 devid[4])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) for (i = 0; i < 4; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) devid[i] = __raw_readl(LPC32XX_CLKPWR_DEVID(i << 2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * Detects and returns IRAM size for the device variation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define LPC32XX_IRAM_BANK_SIZE SZ_128K
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) static u32 iram_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) u32 lpc32xx_return_iram(void __iomem **mapbase, dma_addr_t *dmaaddr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) if (iram_size == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) u32 savedval1, savedval2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) void __iomem *iramptr1, *iramptr2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) iramptr1 = io_p2v(LPC32XX_IRAM_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) iramptr2 = io_p2v(LPC32XX_IRAM_BASE + LPC32XX_IRAM_BANK_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) savedval1 = __raw_readl(iramptr1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) savedval2 = __raw_readl(iramptr2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) if (savedval1 == savedval2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) __raw_writel(savedval2 + 1, iramptr2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) if (__raw_readl(iramptr1) == savedval2 + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) iram_size = LPC32XX_IRAM_BANK_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) iram_size = LPC32XX_IRAM_BANK_SIZE * 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) __raw_writel(savedval2, iramptr2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) iram_size = LPC32XX_IRAM_BANK_SIZE * 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) if (dmaaddr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) *dmaaddr = LPC32XX_IRAM_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) if (mapbase)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) *mapbase = io_p2v(LPC32XX_IRAM_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) return iram_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) EXPORT_SYMBOL_GPL(lpc32xx_return_iram);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) void lpc32xx_set_phy_interface_mode(phy_interface_t mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) u32 tmp = __raw_readl(LPC32XX_CLKPWR_MACCLK_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) tmp &= ~LPC32XX_CLKPWR_MACCTRL_PINS_MSK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) if (mode == PHY_INTERFACE_MODE_MII)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) tmp |= LPC32XX_CLKPWR_MACCTRL_USE_MII_PINS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) tmp |= LPC32XX_CLKPWR_MACCTRL_USE_RMII_PINS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) __raw_writel(tmp, LPC32XX_CLKPWR_MACCLK_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) EXPORT_SYMBOL_GPL(lpc32xx_set_phy_interface_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) static struct map_desc lpc32xx_io_desc[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .virtual = (unsigned long)IO_ADDRESS(LPC32XX_AHB0_START),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .pfn = __phys_to_pfn(LPC32XX_AHB0_START),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .length = LPC32XX_AHB0_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .type = MT_DEVICE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .virtual = (unsigned long)IO_ADDRESS(LPC32XX_AHB1_START),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .pfn = __phys_to_pfn(LPC32XX_AHB1_START),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .length = LPC32XX_AHB1_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .type = MT_DEVICE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .virtual = (unsigned long)IO_ADDRESS(LPC32XX_FABAPB_START),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .pfn = __phys_to_pfn(LPC32XX_FABAPB_START),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .length = LPC32XX_FABAPB_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .type = MT_DEVICE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .virtual = (unsigned long)IO_ADDRESS(LPC32XX_IRAM_BASE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .pfn = __phys_to_pfn(LPC32XX_IRAM_BASE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .length = (LPC32XX_IRAM_BANK_SIZE * 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .type = MT_DEVICE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) void __init lpc32xx_map_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) iotable_init(lpc32xx_io_desc, ARRAY_SIZE(lpc32xx_io_desc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static int __init lpc32xx_check_uid(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) u32 uid[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) lpc32xx_get_uid(uid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) printk(KERN_INFO "LPC32XX unique ID: %08x%08x%08x%08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) uid[3], uid[2], uid[1], uid[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) if (!system_serial_low && !system_serial_high) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) system_serial_low = uid[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) system_serial_high = uid[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) arch_initcall(lpc32xx_check_uid);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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