^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * arch/arm/mach-ixp4xx/wg302-setup.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Board setup for the Netgear WG302 v2 and WAG302 v2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2007 Imre Kaloz <Kaloz@openwrt.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * based on coyote-setup.c:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Copyright (C) 2003-2005 MontaVista Software, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Author: Imre Kaloz <kaloz@openwrt.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/serial.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/tty.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/serial_8250.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <asm/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <asm/setup.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <asm/memory.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <mach/hardware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <asm/mach/flash.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include "irqs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) static struct flash_platform_data wg302v2_flash_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) .map_name = "cfi_probe",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) .width = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) static struct resource wg302v2_flash_resource = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static struct platform_device wg302v2_flash = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .name = "IXP4XX-Flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .platform_data = &wg302v2_flash_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) .num_resources = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) .resource = &wg302v2_flash_resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) static struct resource wg302v2_uart_resource = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .start = IXP4XX_UART2_BASE_PHYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static struct plat_serial8250_port wg302v2_uart_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .mapbase = IXP4XX_UART2_BASE_PHYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .irq = IRQ_IXP4XX_UART2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .iotype = UPIO_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) .regshift = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) .uartclk = IXP4XX_UART_XTAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static struct platform_device wg302v2_uart = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) .name = "serial8250",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .id = PLAT8250_DEV_PLATFORM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .platform_data = wg302v2_uart_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .num_resources = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .resource = &wg302v2_uart_resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static struct platform_device *wg302v2_devices[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) &wg302v2_flash,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) &wg302v2_uart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static void __init wg302v2_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) ixp4xx_sys_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) wg302v2_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) wg302v2_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) platform_add_devices(wg302v2_devices, ARRAY_SIZE(wg302v2_devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #ifdef CONFIG_MACH_WG302V2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) MACHINE_START(WG302V2, "Netgear WG302 v2 / WAG302 v2")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) .map_io = ixp4xx_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) .init_early = ixp4xx_init_early,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .init_irq = ixp4xx_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .init_time = ixp4xx_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .atag_offset = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .init_machine = wg302v2_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #if defined(CONFIG_PCI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .dma_zone_size = SZ_64M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .restart = ixp4xx_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) MACHINE_END
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #endif