^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * arch/arm/mach-ixp4xx/omixp-setup.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * omicron ixp4xx board setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2009 OMICRON electronics GmbH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * based nslu2-setup.c, ixdp425-setup.c:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright (C) 2003-2004 MontaVista Software, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/serial.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/serial_8250.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/mtd/mtd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/mtd/partitions.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/leds.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <asm/setup.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/memory.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <asm/mach/flash.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <mach/hardware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include "irqs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) static struct resource omixp_flash_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) static struct mtd_partition omixp_partitions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) .name = "Recovery Bootloader",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) .size = 0x00020000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .offset = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .name = "Calibration Data",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .size = 0x00020000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .offset = 0x00020000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .name = "Recovery FPGA",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) .size = 0x00020000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) .offset = 0x00040000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .name = "Release Bootloader",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .size = 0x00020000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .offset = 0x00060000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .name = "Release FPGA",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .size = 0x00020000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .offset = 0x00080000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .name = "Kernel",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .size = 0x00160000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .offset = 0x000a0000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .name = "Filesystem",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .size = 0x00C00000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .offset = 0x00200000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) .name = "Persistent Storage",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .size = 0x00200000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .offset = 0x00E00000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) static struct flash_platform_data omixp_flash_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .map_name = "cfi_probe",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .parts = omixp_partitions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .nr_parts = ARRAY_SIZE(omixp_partitions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .map_name = "cfi_probe",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .parts = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .nr_parts = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static struct platform_device omixp_flash_device[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .name = "IXP4XX-Flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .platform_data = &omixp_flash_data[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .resource = &omixp_flash_resources[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .num_resources = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .name = "IXP4XX-Flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .platform_data = &omixp_flash_data[1],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .resource = &omixp_flash_resources[1],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .num_resources = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) /* Swap UART's - These boards have the console on UART2. The following
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * configuration is used:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * ttyS0 .. UART2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * ttyS1 .. UART1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * This way standard images can be used with the kernel that expect
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * the console on ttyS0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static struct resource omixp_uart_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .start = IXP4XX_UART2_BASE_PHYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .start = IXP4XX_UART1_BASE_PHYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static struct plat_serial8250_port omixp_uart_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .mapbase = IXP4XX_UART2_BASE_PHYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .irq = IRQ_IXP4XX_UART2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .iotype = UPIO_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .regshift = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .uartclk = IXP4XX_UART_XTAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .mapbase = IXP4XX_UART1_BASE_PHYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .irq = IRQ_IXP4XX_UART1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) .iotype = UPIO_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) .regshift = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) .uartclk = IXP4XX_UART_XTAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) /* list termination */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static struct platform_device omixp_uart = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .name = "serial8250",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .id = PLAT8250_DEV_PLATFORM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) .dev.platform_data = omixp_uart_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .num_resources = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .resource = omixp_uart_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static struct gpio_led mic256_led_pins[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .name = "LED-A",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) .gpio = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static struct gpio_led_platform_data mic256_led_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .num_leds = ARRAY_SIZE(mic256_led_pins),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .leds = mic256_led_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) static struct platform_device mic256_leds = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) .name = "leds-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) .dev.platform_data = &mic256_led_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) /* Built-in 10/100 Ethernet MAC interfaces */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) static struct resource ixp425_npeb_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) .start = IXP4XX_EthB_BASE_PHYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) .end = IXP4XX_EthB_BASE_PHYS + 0x0fff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) static struct resource ixp425_npec_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) .start = IXP4XX_EthC_BASE_PHYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) .end = IXP4XX_EthC_BASE_PHYS + 0x0fff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) static struct eth_plat_info ixdp425_plat_eth[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) .phy = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) .rxq = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) .txreadyq = 20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) .phy = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) .rxq = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) .txreadyq = 21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) static struct platform_device ixdp425_eth[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) .name = "ixp4xx_eth",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) .id = IXP4XX_ETH_NPEB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) .dev.platform_data = ixdp425_plat_eth,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) .num_resources = ARRAY_SIZE(ixp425_npeb_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) .resource = ixp425_npeb_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) .name = "ixp4xx_eth",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) .id = IXP4XX_ETH_NPEC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) .dev.platform_data = ixdp425_plat_eth + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) .num_resources = ARRAY_SIZE(ixp425_npec_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) .resource = ixp425_npec_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) static struct platform_device *devixp_pldev[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) &omixp_uart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) &omixp_flash_device[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) &ixdp425_eth[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) &ixdp425_eth[1],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) static struct platform_device *mic256_pldev[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) &omixp_uart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) &omixp_flash_device[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) &mic256_leds,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) &ixdp425_eth[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) &ixdp425_eth[1],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) static struct platform_device *miccpt_pldev[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) &omixp_uart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) &omixp_flash_device[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) &omixp_flash_device[1],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) &ixdp425_eth[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) &ixdp425_eth[1],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static void __init omixp_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) ixp4xx_sys_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) /* 16MiB Boot Flash */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) omixp_flash_resources[0].start = IXP4XX_EXP_BUS_BASE(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) omixp_flash_resources[0].end = IXP4XX_EXP_BUS_END(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) /* 32 MiB Data Flash */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) omixp_flash_resources[1].start = IXP4XX_EXP_BUS_BASE(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) omixp_flash_resources[1].end = IXP4XX_EXP_BUS_END(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) if (machine_is_devixp())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) platform_add_devices(devixp_pldev, ARRAY_SIZE(devixp_pldev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) else if (machine_is_miccpt())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) platform_add_devices(miccpt_pldev, ARRAY_SIZE(miccpt_pldev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) else if (machine_is_mic256())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) platform_add_devices(mic256_pldev, ARRAY_SIZE(mic256_pldev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) #ifdef CONFIG_MACH_DEVIXP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) MACHINE_START(DEVIXP, "Omicron DEVIXP")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) .atag_offset = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) .map_io = ixp4xx_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) .init_early = ixp4xx_init_early,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) .init_irq = ixp4xx_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) .init_time = ixp4xx_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) .init_machine = omixp_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) .restart = ixp4xx_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) MACHINE_END
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) #ifdef CONFIG_MACH_MICCPT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) MACHINE_START(MICCPT, "Omicron MICCPT")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) .atag_offset = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) .map_io = ixp4xx_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) .init_early = ixp4xx_init_early,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) .init_irq = ixp4xx_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) .init_time = ixp4xx_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) .init_machine = omixp_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) #if defined(CONFIG_PCI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) .dma_zone_size = SZ_64M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) .restart = ixp4xx_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) MACHINE_END
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) #ifdef CONFIG_MACH_MIC256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) MACHINE_START(MIC256, "Omicron MIC256")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) .atag_offset = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) .map_io = ixp4xx_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) .init_early = ixp4xx_init_early,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) .init_irq = ixp4xx_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) .init_time = ixp4xx_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) .init_machine = omixp_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) .restart = ixp4xx_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) MACHINE_END
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) #endif