^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * arch/arm/mach-ixp4xx/gtwx5715-setup.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Gemtek GTWX5715 (Linksys WRV54G) board setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2004 George T. Joseph
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Derived from Coyote
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/serial.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/tty.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/serial_8250.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <asm/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/setup.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <asm/memory.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <mach/hardware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <asm/mach/flash.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include "irqs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) /* GPIO 5,6,7 and 12 are hard wired to the Kendin KS8995M Switch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) and operate as an SPI type interface. The details of the interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) are available on Kendin/Micrel's web site. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define GTWX5715_KSSPI_SELECT 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define GTWX5715_KSSPI_TXD 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define GTWX5715_KSSPI_CLOCK 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define GTWX5715_KSSPI_RXD 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /* The "reset" button is wired to GPIO 3.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) The GPIO is brought "low" when the button is pushed. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define GTWX5715_BUTTON_GPIO 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /* Board Label Front Label
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) LED1 Power
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) LED2 Wireless-G
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) LED3 not populated but could be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) LED4 Internet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) LED5 - LED8 Controlled by KS8995M Switch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) LED9 DMZ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define GTWX5715_LED1_GPIO 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define GTWX5715_LED2_GPIO 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define GTWX5715_LED3_GPIO 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define GTWX5715_LED4_GPIO 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define GTWX5715_LED9_GPIO 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * Xscale UART registers are 32 bits wide with only the least
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * significant 8 bits having any meaning. From a configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * perspective, this means 2 things...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * Setting .regshift = 2 so that the standard 16550 registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * line up on every 4th byte.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * Shifting the register start virtual address +3 bytes when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * compiled big-endian. Since register writes are done on a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * single byte basis, if the shift isn't done the driver will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * write the value into the most significant byte of the register,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * which is ignored, instead of the least significant.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #ifdef __ARMEB__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define REG_OFFSET 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define REG_OFFSET 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * Only the second or "console" uart is connected on the gtwx5715.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static struct resource gtwx5715_uart_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .start = IXP4XX_UART2_BASE_PHYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .start = IRQ_IXP4XX_UART2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .end = IRQ_IXP4XX_UART2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) static struct plat_serial8250_port gtwx5715_uart_platform_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .mapbase = IXP4XX_UART2_BASE_PHYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .irq = IRQ_IXP4XX_UART2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .iotype = UPIO_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .regshift = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) .uartclk = IXP4XX_UART_XTAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static struct platform_device gtwx5715_uart_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .name = "serial8250",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .id = PLAT8250_DEV_PLATFORM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .platform_data = gtwx5715_uart_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .num_resources = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .resource = gtwx5715_uart_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static struct flash_platform_data gtwx5715_flash_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .map_name = "cfi_probe",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) .width = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static struct resource gtwx5715_flash_resource = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static struct platform_device gtwx5715_flash = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .name = "IXP4XX-Flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .platform_data = >wx5715_flash_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .num_resources = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .resource = >wx5715_flash_resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static struct platform_device *gtwx5715_devices[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) >wx5715_uart_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) >wx5715_flash,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) static void __init gtwx5715_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) ixp4xx_sys_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) gtwx5715_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) gtwx5715_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_8M - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) platform_add_devices(gtwx5715_devices, ARRAY_SIZE(gtwx5715_devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) MACHINE_START(GTWX5715, "Gemtek GTWX5715 (Linksys WRV54G)")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) /* Maintainer: George Joseph */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) .map_io = ixp4xx_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .init_early = ixp4xx_init_early,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) .init_irq = ixp4xx_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) .init_time = ixp4xx_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) .atag_offset = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) .init_machine = gtwx5715_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #if defined(CONFIG_PCI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .dma_zone_size = SZ_64M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) .restart = ixp4xx_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) MACHINE_END
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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