Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * arch/arm/mach-ixp4xx/fsg-setup.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * FSG board-setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Copyright (C) 2008 Rod Whitby <rod@whitby.id.au>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * based on ixdp425-setup.c:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  *	Copyright (C) 2003-2004 MontaVista Software, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * based on nslu2-power.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  *	Copyright (C) 2005 Tower Technologies
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  * Author: Rod Whitby <rod@whitby.id.au>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  * Maintainers: http://www.nslu2-linux.org/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/if_ether.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/serial.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/serial_8250.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/leds.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/reboot.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <linux/gpio/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #include <asm/mach/flash.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #include "irqs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define FSG_SDA_PIN		12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define FSG_SCL_PIN		13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define FSG_SB_GPIO		4	/* sync button */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define FSG_RB_GPIO		9	/* reset button */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define FSG_UB_GPIO		10	/* usb button */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) static struct flash_platform_data fsg_flash_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	.map_name		= "cfi_probe",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	.width			= 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) static struct resource fsg_flash_resource = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	.flags			= IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) static struct platform_device fsg_flash = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	.name			= "IXP4XX-Flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	.id			= 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	.dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 		.platform_data	= &fsg_flash_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	.num_resources		= 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	.resource		= &fsg_flash_resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) static struct gpiod_lookup_table fsg_i2c_gpiod_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	.dev_id		= "i2c-gpio.0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	.table		= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 		GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", FSG_SDA_PIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 				NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", FSG_SCL_PIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 				NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) static struct platform_device fsg_i2c_gpio = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	.name			= "i2c-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	.id			= 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	.dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		.platform_data	= NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) static struct i2c_board_info __initdata fsg_i2c_board_info [] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		I2C_BOARD_INFO("isl1208", 0x6f),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) static struct resource fsg_uart_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		.start		= IXP4XX_UART1_BASE_PHYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		.end		= IXP4XX_UART1_BASE_PHYS + 0x0fff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		.flags		= IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		.start		= IXP4XX_UART2_BASE_PHYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		.end		= IXP4XX_UART2_BASE_PHYS + 0x0fff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		.flags		= IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) static struct plat_serial8250_port fsg_uart_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		.mapbase	= IXP4XX_UART1_BASE_PHYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		.membase	= (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		.irq		= IRQ_IXP4XX_UART1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		.iotype		= UPIO_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		.regshift	= 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		.uartclk	= IXP4XX_UART_XTAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		.mapbase	= IXP4XX_UART2_BASE_PHYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		.membase	= (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		.irq		= IRQ_IXP4XX_UART2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		.iotype		= UPIO_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		.regshift	= 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		.uartclk	= IXP4XX_UART_XTAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) static struct platform_device fsg_uart = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	.name			= "serial8250",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	.id			= PLAT8250_DEV_PLATFORM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	.dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		.platform_data	= fsg_uart_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	.num_resources		= ARRAY_SIZE(fsg_uart_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	.resource		= fsg_uart_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static struct platform_device fsg_leds = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	.name		= "fsg-led",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	.id		= -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) /* Built-in 10/100 Ethernet MAC interfaces */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static struct resource fsg_eth_npeb_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		.start		= IXP4XX_EthB_BASE_PHYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		.end		= IXP4XX_EthB_BASE_PHYS + 0x0fff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		.flags		= IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static struct resource fsg_eth_npec_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		.start		= IXP4XX_EthC_BASE_PHYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		.end		= IXP4XX_EthC_BASE_PHYS + 0x0fff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		.flags		= IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static struct eth_plat_info fsg_plat_eth[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		.phy		= 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		.rxq		= 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		.txreadyq	= 20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	}, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		.phy		= 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 		.rxq		= 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		.txreadyq	= 21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static struct platform_device fsg_eth[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		.name			= "ixp4xx_eth",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 		.id			= IXP4XX_ETH_NPEB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		.dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 			.platform_data	= fsg_plat_eth,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 		.num_resources	= ARRAY_SIZE(fsg_eth_npeb_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		.resource	= fsg_eth_npeb_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	}, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 		.name			= "ixp4xx_eth",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		.id			= IXP4XX_ETH_NPEC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 		.dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 			.platform_data	= fsg_plat_eth + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		.num_resources	= ARRAY_SIZE(fsg_eth_npec_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		.resource	= fsg_eth_npec_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) static struct platform_device *fsg_devices[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	&fsg_i2c_gpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	&fsg_flash,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	&fsg_leds,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	&fsg_eth[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	&fsg_eth[1],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) static irqreturn_t fsg_power_handler(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	/* Signal init to do the ctrlaltdel action, this will bypass init if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	 * it hasn't started and do a kernel_restart.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	ctrl_alt_del();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) static irqreturn_t fsg_reset_handler(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	/* This is the paper-clip reset which does an emergency reboot. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	printk(KERN_INFO "Restarting system.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	machine_restart(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	/* This should never be reached. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) static void __init fsg_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	uint8_t __iomem *f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	ixp4xx_sys_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	fsg_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	fsg_flash_resource.end =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	*IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	*IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	/* Configure CS2 for operation, 8bit and writable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	*IXP4XX_EXP_CS2 = 0xbfff0002;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	gpiod_add_lookup_table(&fsg_i2c_gpiod_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	i2c_register_board_info(0, fsg_i2c_board_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 				ARRAY_SIZE(fsg_i2c_board_info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	/* This is only useful on a modified machine, but it is valuable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	 * to have it first in order to see debug messages, and so that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	 * it does *not* get removed if platform_add_devices fails!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	(void)platform_device_register(&fsg_uart);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	platform_add_devices(fsg_devices, ARRAY_SIZE(fsg_devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	if (request_irq(gpio_to_irq(FSG_RB_GPIO), &fsg_reset_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 			IRQF_TRIGGER_LOW, "FSG reset button", NULL) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 		printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 			gpio_to_irq(FSG_RB_GPIO));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	if (request_irq(gpio_to_irq(FSG_SB_GPIO), &fsg_power_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 			IRQF_TRIGGER_LOW, "FSG power button", NULL) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 		printk(KERN_DEBUG "Power Button IRQ %d not available\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 			gpio_to_irq(FSG_SB_GPIO));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	 * Map in a portion of the flash and read the MAC addresses.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	 * Since it is stored in BE in the flash itself, we need to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	 * byteswap it if we're in LE mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	f = ioremap(IXP4XX_EXP_BUS_BASE(0), 0x400000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	if (f) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) #ifdef __ARMEB__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 		int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 		for (i = 0; i < 6; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 			fsg_plat_eth[0].hwaddr[i] = readb(f + 0x3C0422 + i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 			fsg_plat_eth[1].hwaddr[i] = readb(f + 0x3C043B + i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 		  Endian-swapped reads from unaligned addresses are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 		  required to extract the two MACs from the big-endian
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 		  Redboot config area in flash.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 		*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 		fsg_plat_eth[0].hwaddr[0] = readb(f + 0x3C0421);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 		fsg_plat_eth[0].hwaddr[1] = readb(f + 0x3C0420);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 		fsg_plat_eth[0].hwaddr[2] = readb(f + 0x3C0427);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 		fsg_plat_eth[0].hwaddr[3] = readb(f + 0x3C0426);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 		fsg_plat_eth[0].hwaddr[4] = readb(f + 0x3C0425);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 		fsg_plat_eth[0].hwaddr[5] = readb(f + 0x3C0424);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 		fsg_plat_eth[1].hwaddr[0] = readb(f + 0x3C0439);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 		fsg_plat_eth[1].hwaddr[1] = readb(f + 0x3C043F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 		fsg_plat_eth[1].hwaddr[2] = readb(f + 0x3C043E);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 		fsg_plat_eth[1].hwaddr[3] = readb(f + 0x3C043D);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 		fsg_plat_eth[1].hwaddr[4] = readb(f + 0x3C043C);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 		fsg_plat_eth[1].hwaddr[5] = readb(f + 0x3C0443);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 		iounmap(f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	printk(KERN_INFO "FSG: Using MAC address %pM for port 0\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	       fsg_plat_eth[0].hwaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	printk(KERN_INFO "FSG: Using MAC address %pM for port 1\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	       fsg_plat_eth[1].hwaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) MACHINE_START(FSG, "Freecom FSG-3")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	/* Maintainer: www.nslu2-linux.org */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	.map_io		= ixp4xx_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	.init_early	= ixp4xx_init_early,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	.init_irq	= ixp4xx_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	.init_time	= ixp4xx_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	.atag_offset	= 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	.init_machine	= fsg_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) #if defined(CONFIG_PCI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	.dma_zone_size	= SZ_64M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	.restart	= ixp4xx_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) MACHINE_END
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)