Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * arch/arm/mach-ixp4xx/coyote-pci.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * PCI setup routines for ADI Engineering Coyote platform
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * Copyright (C) 2002 Jungo Software Technologies.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * Copyright (C) 2003 MontaVista Softwrae, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  * Maintainer: Deepak Saxena <dsaxena@mvista.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <mach/hardware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/mach/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include "irqs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define SLOT0_DEVID	14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define SLOT1_DEVID	15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) /* PCI controller GPIO to IRQ pin mappings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define SLOT0_INTA	6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define SLOT1_INTA	11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) void __init coyote_pci_preinit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	irq_set_irq_type(IXP4XX_GPIO_IRQ(SLOT0_INTA), IRQ_TYPE_LEVEL_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	irq_set_irq_type(IXP4XX_GPIO_IRQ(SLOT1_INTA), IRQ_TYPE_LEVEL_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	ixp4xx_pci_preinit();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static int __init coyote_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	if (slot == SLOT0_DEVID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 		return IXP4XX_GPIO_IRQ(SLOT0_INTA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	else if (slot == SLOT1_DEVID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 		return IXP4XX_GPIO_IRQ(SLOT1_INTA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	else return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) struct hw_pci coyote_pci __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	.nr_controllers = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	.ops		= &ixp4xx_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	.preinit =        coyote_pci_preinit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	.setup =          ixp4xx_setup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	.map_irq =        coyote_map_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) int __init coyote_pci_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	if (machine_is_adi_coyote())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 		pci_common_init(&coyote_pci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) subsys_initcall(coyote_pci_init);