^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Thecus N2100 board registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #ifndef __N2100_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define __N2100_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define N2100_UART 0xfe800000 /* UART */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define N2100_COPY_BUTTON IOP3XX_GPIO_LINE(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define N2100_PCA9532_RESET IOP3XX_GPIO_LINE(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define N2100_RESET_BUTTON IOP3XX_GPIO_LINE(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define N2100_HARDWARE_RESET IOP3XX_GPIO_LINE(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define N2100_POWER_BUTTON IOP3XX_GPIO_LINE(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #endif