Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * arch/arm/mach-iop32x/em7210.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Board support code for the Lanner EM7210 platforms.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Based on arch/arm/mach-iop32x/iq31244.c file.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * Copyright (C) 2007 Arnaud Patard <arnaud.patard@rtp-net.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/pm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/serial_core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/serial_8250.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/mtd/physmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/gpio/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <asm/mach/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include <asm/mach/time.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #include "hardware.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #include "gpio-iop32x.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #include "irqs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) static void __init em7210_timer_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	/* http://www.kwaak.net/fotos/fotos-nas/slide_24.html */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	/* 33.333 MHz crystal.                                */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	iop_init_time(200000000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44)  * EM7210 RTC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) static struct i2c_board_info __initdata em7210_i2c_devices[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 		I2C_BOARD_INFO("rs5c372a", 0x32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53)  * EM7210 I/O
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) static struct map_desc em7210_io_desc[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	{	/* on-board devices */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 		.virtual	= IQ31244_UART,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 		.pfn		= __phys_to_pfn(IQ31244_UART),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		.length		= 0x00100000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 		.type		= MT_DEVICE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) void __init em7210_map_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	iop3xx_map_io();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	iotable_init(em7210_io_desc, ARRAY_SIZE(em7210_io_desc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72)  * EM7210 PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) #define INTA	IRQ_IOP32X_XINT0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) #define INTB	IRQ_IOP32X_XINT1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) #define INTC	IRQ_IOP32X_XINT2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) #define INTD	IRQ_IOP32X_XINT3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) static int __init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) em7210_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	static int pci_irq_table[][4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		 * PCI IDSEL/INTPIN->INTLINE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		 * A       B       C       D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		{INTB, INTB, INTB, INTB}, /* console / uart */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		{INTA, INTA, INTA, INTA}, /* 1st 82541      */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		{INTD, INTD, INTD, INTD}, /* 2nd 82541      */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		{INTC, INTC, INTC, INTC}, /* GD31244        */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		{INTD, INTA, INTA, INTA}, /* mini-PCI       */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		{INTD, INTC, INTA, INTA}, /* NEC USB        */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	if (pin < 1 || pin > 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	return pci_irq_table[slot % 6][pin - 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static struct hw_pci em7210_pci __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	.nr_controllers = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	.ops		= &iop3xx_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	.setup		= iop3xx_pci_setup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	.preinit	= iop3xx_pci_preinit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	.map_irq	= em7210_pci_map_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static int __init em7210_pci_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	if (machine_is_em7210())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		pci_common_init(&em7210_pci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) subsys_initcall(em7210_pci_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)  * EM7210 Flash
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static struct physmap_flash_data em7210_flash_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	.width		= 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static struct resource em7210_flash_resource = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	.start		= 0xf0000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	.end		= 0xf1ffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	.flags		= IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static struct platform_device em7210_flash_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	.name		= "physmap-flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	.id		= 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	.dev		= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		.platform_data	= &em7210_flash_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	.num_resources	= 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	.resource	= &em7210_flash_resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)  * EM7210 UART
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)  * The physical address of the serial port is 0xfe800000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)  * so it can be used for physical and virtual address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) static struct plat_serial8250_port em7210_serial_port[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		.mapbase	= IQ31244_UART,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		.membase	= (char *)IQ31244_UART,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		.irq		= IRQ_IOP32X_XINT1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		.flags		= UPF_SKIP_TEST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		.iotype		= UPIO_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		.regshift	= 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		.uartclk	= 1843200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	{ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static struct resource em7210_uart_resource = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	.start		= IQ31244_UART,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	.end		= IQ31244_UART + 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	.flags		= IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static struct platform_device em7210_serial_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	.name		= "serial8250",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	.id		= PLAT8250_DEV_PLATFORM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	.dev		= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		.platform_data		= em7210_serial_port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	.num_resources	= 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	.resource	= &em7210_uart_resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #define EM7210_HARDWARE_POWER 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) void em7210_power_off(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	ret = gpio_direction_output(EM7210_HARDWARE_POWER, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 		pr_crit("could not drive power off GPIO high\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) static int __init em7210_request_gpios(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	if (!machine_is_em7210())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	ret = gpio_request(EM7210_HARDWARE_POWER, "power");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 		pr_err("could not request power off GPIO\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	pm_power_off = em7210_power_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) device_initcall(em7210_request_gpios);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) static void __init em7210_init_machine(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	register_iop32x_gpio();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	platform_device_register(&em7210_serial_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	gpiod_add_lookup_table(&iop3xx_i2c0_gpio_lookup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	gpiod_add_lookup_table(&iop3xx_i2c1_gpio_lookup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	platform_device_register(&iop3xx_i2c0_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	platform_device_register(&iop3xx_i2c1_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	platform_device_register(&em7210_flash_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	platform_device_register(&iop3xx_dma_0_channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	platform_device_register(&iop3xx_dma_1_channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	i2c_register_board_info(0, em7210_i2c_devices,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		ARRAY_SIZE(em7210_i2c_devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) MACHINE_START(EM7210, "Lanner EM7210")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	.atag_offset	= 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	.map_io		= em7210_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	.init_irq	= iop32x_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	.init_time	= em7210_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	.init_machine	= em7210_init_machine,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	.restart	= iop3xx_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) MACHINE_END