Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2)  * i.MX27 Power Management Routines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * Based on Freescale's BSP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * This program is free software; you can redistribute it and/or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * modify it under the terms of the GNU General Public License.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/suspend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "hardware.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) static int mx27_suspend_enter(suspend_state_t state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	void __iomem *ccm_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	u32 cscr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	np = of_find_compatible_node(NULL, NULL, "fsl,imx27-ccm");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	ccm_base = of_iomap(np, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	BUG_ON(!ccm_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	switch (state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	case PM_SUSPEND_MEM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 		/* Clear MPEN and SPEN to disable MPLL/SPLL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 		cscr = imx_readl(ccm_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		cscr &= 0xFFFFFFFC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 		imx_writel(cscr, ccm_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 		/* Executes WFI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 		cpu_do_idle();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static const struct platform_suspend_ops mx27_suspend_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	.enter = mx27_suspend_enter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	.valid = suspend_valid_only_mem,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) void __init imx27_pm_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	suspend_set_ops(&mx27_suspend_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) }