Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * This contains i.MX27-specific hardware definitions. For those
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * hardware pieces that are common between i.MX21 and i.MX27, have a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * look at mx2x.h.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #ifndef __MACH_MX27_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define __MACH_MX27_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define MX27_AIPI_BASE_ADDR		0x10000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define MX27_AIPI_SIZE			SZ_1M
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define MX27_SAHB1_BASE_ADDR		0x80000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define MX27_SAHB1_SIZE			SZ_1M
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define MX27_X_MEMC_BASE_ADDR		0xd8000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define MX27_X_MEMC_SIZE		SZ_1M
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define MX27_IO_P2V(x)			IMX_IO_P2V(x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #endif /* ifndef __MACH_MX27_H__ */