^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright 2014 Freescale Semiconductor, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/irqchip.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/phy.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/mfd/syscon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include "cpuidle.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) static int ar8031_phy_fixup(struct phy_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) u16 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /* Set RGMII IO voltage to 1.8V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) phy_write(dev, 0x1d, 0x1f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) phy_write(dev, 0x1e, 0x8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) /* introduce tx clock delay */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) phy_write(dev, 0x1d, 0x5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) val = phy_read(dev, 0x1e);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) val |= 0x0100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) phy_write(dev, 0x1e, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define PHY_ID_AR8031 0x004dd074
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static void __init imx6sx_enet_phy_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) if (IS_BUILTIN(CONFIG_PHYLIB))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) phy_register_fixup_for_uid(PHY_ID_AR8031, 0xffffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) ar8031_phy_fixup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static void __init imx6sx_enet_clk_sel(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct regmap *gpr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sx-iomuxc-gpr");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) if (!IS_ERR(gpr)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) regmap_update_bits(gpr, IOMUXC_GPR1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) IMX6SX_GPR1_FEC_CLOCK_MUX_SEL_MASK, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) regmap_update_bits(gpr, IOMUXC_GPR1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) IMX6SX_GPR1_FEC_CLOCK_PAD_DIR_MASK, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) pr_err("failed to find fsl,imx6sx-iomux-gpr regmap\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static inline void imx6sx_enet_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) imx6sx_enet_phy_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) imx6sx_enet_clk_sel();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) static void __init imx6sx_init_machine(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) of_platform_default_populate(NULL, NULL, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) imx6sx_enet_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) imx_anatop_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) imx6sx_pm_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) static void __init imx6sx_init_irq(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) imx_gpc_check_dt();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) imx_init_revision_from_anatop();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) imx_init_l2cache();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) imx_src_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) irqchip_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) imx6_pm_ccm_init("fsl,imx6sx-ccm");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) static void __init imx6sx_init_late(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) imx6sx_cpuidle_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) static const char * const imx6sx_dt_compat[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) "fsl,imx6sx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) DT_MACHINE_START(IMX6SX, "Freescale i.MX6 SoloX (Device Tree)")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .l2c_aux_val = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .l2c_aux_mask = ~0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .init_irq = imx6sx_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .init_machine = imx6sx_init_machine,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .dt_compat = imx6sx_dt_compat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .init_late = imx6sx_init_late,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) MACHINE_END
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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