^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright 2011 Linaro Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/mach/time.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include "hardware.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) static void __init imx51_init_early(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) mxc_set_cpu_type(MXC_CPU_MX51);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * The MIPI HSC unit has been removed from the i.MX51 Reference Manual by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * the Freescale marketing division. However this did not remove the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * hardware from the chip which still needs to be configured for proper
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * IPU support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define MX51_MIPI_HSC_BASE 0x83fdc000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static void __init imx51_ipu_mipi_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) void __iomem *hsc_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) hsc_addr = ioremap(MX51_MIPI_HSC_BASE, SZ_16K);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) WARN_ON(!hsc_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /* setup MIPI module to legacy mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) imx_writel(0xf00, hsc_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /* CSI mode: reserved; DI control mode: legacy (from Freescale BSP) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) imx_writel(imx_readl(hsc_addr + 0x800) | 0x30ff, hsc_addr + 0x800);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) iounmap(hsc_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) static void __init imx51_m4if_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) void __iomem *m4if_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) np = of_find_compatible_node(NULL, NULL, "fsl,imx51-m4if");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) if (!np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) m4if_base = of_iomap(np, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) of_node_put(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) if (!m4if_base) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) pr_err("Unable to map M4IF registers\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * Configure VPU and IPU with higher priorities
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * in order to avoid artifacts during video playback
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) writel_relaxed(0x00000203, m4if_base + 0x40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) writel_relaxed(0x00000000, m4if_base + 0x44);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) writel_relaxed(0x00120125, m4if_base + 0x9c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) writel_relaxed(0x001901A3, m4if_base + 0x48);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) iounmap(m4if_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) static void __init imx51_dt_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) imx51_ipu_mipi_setup();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) imx_src_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) imx51_m4if_setup();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) imx5_pmu_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) imx_aips_allow_unprivileged_access("fsl,imx51-aipstz");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static void __init imx51_init_late(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) mx51_neon_fixup();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) imx51_pm_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) static const char * const imx51_dt_board_compat[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) "fsl,imx51",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) DT_MACHINE_START(IMX51_DT, "Freescale i.MX51 (Device Tree Support)")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .init_early = imx51_init_early,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .init_machine = imx51_dt_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .init_late = imx51_init_late,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .dt_compat = imx51_dt_board_compat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) MACHINE_END
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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