Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *  Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include "common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "hardware.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define MX1_AVIC_ADDR	0x00223000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) static void __init imx1_init_early(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	mxc_set_cpu_type(MXC_CPU_MX1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) static void __init imx1_init_irq(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	void __iomem *avic_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	avic_addr = ioremap(MX1_AVIC_ADDR, SZ_4K);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	WARN_ON(!avic_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	mxc_init_irq(avic_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static const char * const imx1_dt_board_compat[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	"fsl,imx1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) DT_MACHINE_START(IMX1_DT, "Freescale i.MX1 (Device Tree Support)")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	.init_early	= imx1_init_early,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	.init_irq	= imx1_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	.dt_compat	= imx1_dt_board_compat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	.restart	= mxc_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) MACHINE_END