^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright 2004-2007, 2014 Freescale Semiconductor, Inc. All Rights Reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #ifndef __ASM_ARCH_MXC_HARDWARE_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define __ASM_ARCH_MXC_HARDWARE_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #ifndef __ASSEMBLY__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <soc/imx/revision.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/sizes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define addr_in_module(addr, mod) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) ((unsigned long)(addr) - mod ## _BASE_ADDR < mod ## _SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define IMX_IO_P2V_MODULE(addr, module) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) (((addr) - module ## _BASE_ADDR) < module ## _SIZE ? \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) (addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * This is rather complicated for humans and ugly to verify, but for a machine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * it's OK. Still more as it is usually only applied to constants. The upsides
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * on using this approach are:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * - same mapping on all i.MX machines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * - works for assembler, too
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * - no need to nurture #defines for virtual addresses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * The downside it, it's hard to verify (but I have a script for that).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * Obviously this needs to be injective for each SoC. In general it maps the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * whole address space to [0xf4000000, 0xf5ffffff]. So [0xf6000000,0xfeffffff]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * is free for per-machine use (e.g. KZM_ARM11_01 uses 64MiB there).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * It applies the following mappings for the different SoCs:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * mx1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * IO 0x00200000+0x100000 -> 0xf4000000+0x100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * mx21:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * AIPI 0x10000000+0x100000 -> 0xf4400000+0x100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * SAHB1 0x80000000+0x100000 -> 0xf5000000+0x100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * X_MEMC 0xdf000000+0x004000 -> 0xf5f00000+0x004000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * mx25:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * mx27:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * AIPI 0x10000000+0x100000 -> 0xf4400000+0x100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * SAHB1 0x80000000+0x100000 -> 0xf5000000+0x100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * X_MEMC 0xd8000000+0x100000 -> 0xf5c00000+0x100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * mx31:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * X_MEMC 0xb8000000+0x010000 -> 0xf5c00000+0x010000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * mx35:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * X_MEMC 0xb8000000+0x010000 -> 0xf5c00000+0x010000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * mx51:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * TZIC 0x0fffc000+0x004000 -> 0xf4bfc000+0x004000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * IRAM 0x1ffe0000+0x020000 -> 0xf4fe0000+0x020000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * DEBUG 0x60000000+0x100000 -> 0xf5000000+0x100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * SPBA0 0x70000000+0x100000 -> 0xf5400000+0x100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) * AIPS1 0x73f00000+0x100000 -> 0xf5700000+0x100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * AIPS2 0x83f00000+0x100000 -> 0xf5300000+0x100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * mx53:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * TZIC 0x0fffc000+0x004000 -> 0xf4bfc000+0x004000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) * DEBUG 0x40000000+0x100000 -> 0xf5000000+0x100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * AIPS1 0x53f00000+0x100000 -> 0xf5700000+0x100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * AIPS2 0x63f00000+0x100000 -> 0xf5300000+0x100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) * mx6q:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * SCU 0x00a00000+0x004000 -> 0xf4000000+0x004000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * CCM 0x020c4000+0x004000 -> 0xf42c4000+0x004000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * ANATOP 0x020c8000+0x004000 -> 0xf42c8000+0x004000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * UART4 0x021f0000+0x004000 -> 0xf42f0000+0x004000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define IMX_IO_P2V(x) ( \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) (((x) & 0x80000000) >> 7) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) (0xf4000000 + \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) (((x) & 0x50000000) >> 6) + \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) (((x) & 0x0b000000) >> 4) + \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) (((x) & 0x000fffff))))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define IMX_IO_ADDRESS(x) IOMEM(IMX_IO_P2V(x))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #include "mxc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #include "mx3x.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #include "mx31.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #include "mx35.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #include "mx2x.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #include "mx27.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define imx_map_entry(soc, name, _type) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) .virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) .pfn = __phys_to_pfn(soc ## _ ## name ## _BASE_ADDR), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .length = soc ## _ ## name ## _SIZE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .type = _type, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /* There's an off-by-one between the gpio bank number and the gpiochip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /* range e.g. GPIO_1_5 is gpio 5 under linux */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define IMX_GPIO_NR(bank, nr) (((bank) - 1) * 32 + (nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #endif /* __ASM_ARCH_MXC_HARDWARE_H__ */