Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Copyright (C) 2016 Freescale Semiconductor, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * Copyright 2017-2018 NXP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *   Anson Huang <Anson.Huang@nxp.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <linux/cpuidle.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/cpuidle.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "cpuidle.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) static int imx7ulp_enter_wait(struct cpuidle_device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 			    struct cpuidle_driver *drv, int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	if (index == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 		imx7ulp_set_lpm(ULP_PM_WAIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 		imx7ulp_set_lpm(ULP_PM_STOP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	cpu_do_idle();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	imx7ulp_set_lpm(ULP_PM_RUN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	return index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static struct cpuidle_driver imx7ulp_cpuidle_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	.name = "imx7ulp_cpuidle",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	.owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	.states = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 		/* WFI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 		ARM_CPUIDLE_WFI_STATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 		/* WAIT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 		{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 			.exit_latency = 50,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 			.target_residency = 75,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 			.enter = imx7ulp_enter_wait,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 			.name = "WAIT",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 			.desc = "PSTOP2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 		/* STOP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 		{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 			.exit_latency = 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 			.target_residency = 150,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 			.enter = imx7ulp_enter_wait,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 			.name = "STOP",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 			.desc = "PSTOP1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	.state_count = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	.safe_state_index = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) int __init imx7ulp_cpuidle_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	return cpuidle_register(&imx7ulp_cpuidle_driver, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) }