Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * MX35 CPU type detection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "hardware.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "iim.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) static int mx35_cpu_rev = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) static int mx35_read_cpu_rev(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	void __iomem *iim_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	u32 rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	np = of_find_compatible_node(NULL, NULL, "fsl,imx35-iim");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	iim_base = of_iomap(np, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	BUG_ON(!iim_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	rev = imx_readl(iim_base + MXC_IIMSREV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	switch (rev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	case 0x00:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 		return IMX_CHIP_REVISION_1_0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	case 0x10:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		return IMX_CHIP_REVISION_2_0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	case 0x11:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 		return IMX_CHIP_REVISION_2_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 		return IMX_CHIP_REVISION_UNKNOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) int mx35_revision(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	if (mx35_cpu_rev == -1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 		mx35_cpu_rev = mx35_read_cpu_rev();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	return mx35_cpu_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) EXPORT_SYMBOL(mx35_revision);