^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * MX25 CPU type detection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "iim.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "hardware.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) static int mx25_cpu_rev = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) static int mx25_read_cpu_rev(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) u32 rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) void __iomem *iim_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) np = of_find_compatible_node(NULL, NULL, "fsl,imx25-iim");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) iim_base = of_iomap(np, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) BUG_ON(!iim_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) rev = readl(iim_base + MXC_IIMSREV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) iounmap(iim_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) switch (rev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) case 0x00:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) return IMX_CHIP_REVISION_1_0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) case 0x01:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) return IMX_CHIP_REVISION_1_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) return IMX_CHIP_REVISION_UNKNOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) int mx25_revision(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) if (mx25_cpu_rev == -1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) mx25_cpu_rev = mx25_read_cpu_rev();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) return mx25_cpu_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) EXPORT_SYMBOL(mx25_revision);