Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * (Hisilicon's SoC based) flattened device tree enabled machine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright (c) 2012-2013 Hisilicon Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * Copyright (c) 2012-2013 Linaro Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * Author: Haojian Zhuang <haojian.zhuang@linaro.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/clocksource.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/irqchip.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define HI3620_SYSCTRL_PHYS_BASE		0xfc802000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define HI3620_SYSCTRL_VIRT_BASE		0xfe802000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)  * This table is only for optimization. Since ioremap() could always share
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)  * the same mapping if it's defined as static IO mapping.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)  * Without this table, system could also work. The cost is some virtual address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)  * spaces wasted since ioremap() may be called multi times for the same
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)  * IO space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static struct map_desc hi3620_io_desc[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 		/* sysctrl */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		.pfn		= __phys_to_pfn(HI3620_SYSCTRL_PHYS_BASE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 		.virtual	= HI3620_SYSCTRL_VIRT_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 		.length		= 0x1000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 		.type		= MT_DEVICE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static void __init hi3620_map_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	debug_ll_io_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	iotable_init(hi3620_io_desc, ARRAY_SIZE(hi3620_io_desc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static const char *const hi3xxx_compat[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	"hisilicon,hi3620-hi4511",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) DT_MACHINE_START(HI3620, "Hisilicon Hi3620 (Flattened Device Tree)")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	.map_io		= hi3620_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	.dt_compat	= hi3xxx_compat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) MACHINE_END