Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * linux/arch/arm/mach-footbridge/ebsa285-pci.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * PCI bios-type initialisation for PCI machines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * Bits taken from various places.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/mach/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) static int irqmap_ebsa285[] = { IRQ_IN3, IRQ_IN1, IRQ_IN0, IRQ_PCI };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static int ebsa285_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	if (dev->vendor == PCI_VENDOR_ID_CONTAQ &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	    dev->device == PCI_DEVICE_ID_CONTAQ_82C693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 		switch (PCI_FUNC(dev->devfn)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 		case 1:	return 14;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 		case 2:	return 15;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 		case 3:	return 12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	return irqmap_ebsa285[(slot + pin) & 3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) static struct hw_pci ebsa285_pci __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	.map_irq		= ebsa285_map_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	.nr_controllers		= 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	.ops			= &dc21285_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	.setup			= dc21285_setup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	.preinit		= dc21285_preinit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	.postinit		= dc21285_postinit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static int __init ebsa285_init_pci(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	if (machine_is_ebsa285())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 		pci_common_init(&ebsa285_pci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) subsys_initcall(ebsa285_init_pci);