^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * linux/arch/arm/mach-footbridge/cats-hw.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * CATS machine fixup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 1998, 1999 Russell King, Phil Blundell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/screen_info.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <asm/hardware/dec21285.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <asm/setup.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include "common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define CFG_PORT 0x370
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define INDEX_PORT (CFG_PORT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define DATA_PORT (CFG_PORT + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static int __init cats_hw_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) if (machine_is_cats()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /* Set Aladdin to CONFIGURE mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) outb(0x51, CFG_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) outb(0x23, CFG_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /* Select logical device 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) outb(0x07, INDEX_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) outb(0x03, DATA_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /* Set parallel port to DMA channel 3, ECP+EPP1.9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) enable EPP timeout */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) outb(0x74, INDEX_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) outb(0x03, DATA_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) outb(0xf0, INDEX_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) outb(0x0f, DATA_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) outb(0xf1, INDEX_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) outb(0x07, DATA_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) /* Select logical device 4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) outb(0x07, INDEX_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) outb(0x04, DATA_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) /* UART1 high speed mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) outb(0xf0, INDEX_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) outb(0x02, DATA_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /* Select logical device 5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) outb(0x07, INDEX_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) outb(0x05, DATA_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /* UART2 high speed mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) outb(0xf0, INDEX_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) outb(0x02, DATA_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) /* Set Aladdin to RUN mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) outb(0xbb, CFG_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) __initcall(cats_hw_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * CATS uses soft-reboot by default, since
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * hard reboots fail on early boards.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static void __init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) fixup_cats(struct tag *tags, char **cmdline)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) screen_info.orig_video_lines = 25;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) screen_info.orig_video_points = 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) screen_info.orig_y = 24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) MACHINE_START(CATS, "Chalice-CATS")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) /* Maintainer: Philip Blundell */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .atag_offset = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .reboot_mode = REBOOT_SOFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .fixup = fixup_cats,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .map_io = footbridge_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .init_irq = footbridge_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .init_time = isa_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .restart = footbridge_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) MACHINE_END
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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