Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *  Cloned from linux/arch/arm/mach-realview/headsmp.S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *  Copyright (c) 2003 ARM Limited
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *  All Rights Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <linux/linkage.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <asm/assembler.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)  * exynos4 specific entry point for secondary CPUs.  This provides
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)  * a "holding pen" into which all secondary cores are held until we're
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)  * ready for them to initialise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) ENTRY(exynos4_secondary_startup)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) ARM_BE8(setend	be)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	mrc	p15, 0, r0, c0, c0, 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	and	r0, r0, #15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	adr	r4, 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	ldmia	r4, {r5, r6}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	sub	r4, r4, r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	add	r6, r6, r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) pen:	ldr	r7, [r6]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	cmp	r7, r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	bne	pen
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	 * we've been released from the holding pen: secondary_stack
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	 * should now contain the SVC stack for this core
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	b	secondary_startup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) ENDPROC(exynos4_secondary_startup)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	.align 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 1:	.long	.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	.long	exynos_pen_release