^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // Samsung Exynos Flattened Device Tree enabled machine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) // Copyright (c) 2010-2014 Samsung Electronics Co., Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) // http://www.samsung.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/of_fdt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/irqchip.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/soc/samsung/exynos-regs-pmu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/cacheflush.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <asm/hardware/cache-l2x0.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include "common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define S3C_ADDR_BASE 0xF6000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define S3C_ADDR(x) ((void __iomem __force *)S3C_ADDR_BASE + (x))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define S5P_VA_CHIPID S3C_ADDR(0x02000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static struct platform_device exynos_cpuidle = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) .name = "exynos_cpuidle",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #ifdef CONFIG_ARM_EXYNOS_CPUIDLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) .dev.platform_data = exynos_enter_aftr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) void __iomem *sysram_base_addr __ro_after_init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) phys_addr_t sysram_base_phys __ro_after_init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) void __iomem *sysram_ns_base_addr __ro_after_init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) unsigned long exynos_cpu_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static unsigned int exynos_cpu_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) unsigned int exynos_rev(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) return exynos_cpu_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) void __init exynos_sysram_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) struct device_node *node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram") {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) if (!of_device_is_available(node))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) sysram_base_addr = of_iomap(node, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) sysram_base_phys = of_translate_address(node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) of_get_address(node, 0, NULL, NULL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) of_node_put(node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram-ns") {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) if (!of_device_is_available(node))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) sysram_ns_base_addr = of_iomap(node, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) of_node_put(node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) int depth, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct map_desc iodesc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) const __be32 *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) int len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) reg = of_get_flat_dt_prop(node, "reg", &len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) if (reg == NULL || len != (sizeof(unsigned long) * 2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) iodesc.pfn = __phys_to_pfn(be32_to_cpu(reg[0]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) iodesc.length = be32_to_cpu(reg[1]) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) iodesc.virtual = (unsigned long)S5P_VA_CHIPID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) iodesc.type = MT_DEVICE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) iotable_init(&iodesc, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) static void __init exynos_init_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) debug_ll_io_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) /* detect cpu id and rev. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) exynos_cpu_id = readl_relaxed(S5P_VA_CHIPID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) exynos_cpu_rev = exynos_cpu_id & 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) pr_info("Samsung CPU ID: 0x%08lx\n", exynos_cpu_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * Set or clear the USE_DELAYED_RESET_ASSERTION option. Used by smp code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * and suspend.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * This is necessary only on Exynos4 SoCs. When system is running
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) * USE_DELAYED_RESET_ASSERTION should be set so the ARM CLK clock down
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * feature could properly detect global idle state when secondary CPU is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * powered down.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * However this should not be set when such system is going into suspend.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) void exynos_set_delayed_reset_assertion(bool enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) if (of_machine_is_compatible("samsung,exynos4")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) unsigned int tmp, core_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) for (core_id = 0; core_id < num_possible_cpus(); core_id++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) tmp = pmu_raw_readl(EXYNOS_ARM_CORE_OPTION(core_id));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) if (enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) tmp |= S5P_USE_DELAYED_RESET_ASSERTION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) tmp &= ~(S5P_USE_DELAYED_RESET_ASSERTION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) pmu_raw_writel(tmp, EXYNOS_ARM_CORE_OPTION(core_id));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) * Apparently, these SoCs are not able to wake-up from suspend using
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) * the PMU. Too bad. Should they suddenly become capable of such a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) * feat, the matches below should be moved to suspend.c.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static const struct of_device_id exynos_dt_pmu_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) { .compatible = "samsung,exynos5260-pmu" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) { .compatible = "samsung,exynos5410-pmu" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) { /*sentinel*/ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static void exynos_map_pmu(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) np = of_find_matching_node(NULL, exynos_dt_pmu_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if (np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) pmu_base_addr = of_iomap(np, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static void __init exynos_init_irq(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) irqchip_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) * Since platsmp.c needs pmu base address by the time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) * DT is not unflatten so we can't use DT APIs before
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) * init_irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) exynos_map_pmu();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) static void __init exynos_dt_machine_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) * This is called from smp_prepare_cpus if we've built for SMP, but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) * we still need to set it up for PM and firmware ops if not.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) if (!IS_ENABLED(CONFIG_SMP))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) exynos_sysram_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #if defined(CONFIG_SMP) && defined(CONFIG_ARM_EXYNOS_CPUIDLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) if (of_machine_is_compatible("samsung,exynos4210") ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) of_machine_is_compatible("samsung,exynos3250"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) exynos_cpuidle.dev.platform_data = &cpuidle_coupled_exynos_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) if (of_machine_is_compatible("samsung,exynos4210") ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) (of_machine_is_compatible("samsung,exynos4412") &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) (of_machine_is_compatible("samsung,trats2") ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) of_machine_is_compatible("samsung,midas"))) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) of_machine_is_compatible("samsung,exynos3250") ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) of_machine_is_compatible("samsung,exynos5250"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) platform_device_register(&exynos_cpuidle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) static char const *const exynos_dt_compat[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) "samsung,exynos3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) "samsung,exynos3250",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) "samsung,exynos4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) "samsung,exynos4210",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) "samsung,exynos4412",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) "samsung,exynos5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) "samsung,exynos5250",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) "samsung,exynos5260",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) "samsung,exynos5420",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) static void __init exynos_dt_fixup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) * Some versions of uboot pass garbage entries in the memory node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) * use the old CONFIG_ARM_NR_BANKS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) of_fdt_limit_memory(8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) DT_MACHINE_START(EXYNOS_DT, "Samsung Exynos (Flattened Device Tree)")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) .l2c_aux_val = 0x38400000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) .l2c_aux_mask = 0xc60fffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) .smp = smp_ops(exynos_smp_ops),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) .map_io = exynos_init_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) .init_early = exynos_firmware_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) .init_irq = exynos_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) .init_machine = exynos_dt_machine_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) .init_late = exynos_pm_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) .dt_compat = exynos_dt_compat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) .dt_fixup = exynos_dt_fixup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) MACHINE_END
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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