^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * arch/arm/mach-ep93xx/vision_ep9307.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Vision Engraving Systems EP9307 SoM support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2008-2011 Vision Engraving Systems
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * H Hartley Sweeten <hsweeten@visionengravers.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/gpio/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/fb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/mtd/partitions.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/platform_data/pca953x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/spi/flash.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/spi/mmc_spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/mmc/host.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <sound/cs4271.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include "hardware.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/platform_data/video-ep93xx.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/platform_data/spi-ep93xx.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include "gpio-ep93xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include "soc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /*************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * Static I/O mappings for the FPGA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) *************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define VISION_PHYS_BASE EP93XX_CS7_PHYS_BASE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define VISION_VIRT_BASE 0xfebff000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static struct map_desc vision_io_desc[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) .virtual = VISION_VIRT_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) .pfn = __phys_to_pfn(VISION_PHYS_BASE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .length = SZ_4K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .type = MT_DEVICE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static void __init vision_map_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) ep93xx_map_io();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) iotable_init(vision_io_desc, ARRAY_SIZE(vision_io_desc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) /*************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * Ethernet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) *************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static struct ep93xx_eth_data vision_eth_data __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) .phy_id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) /*************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) * Framebuffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) *************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define VISION_LCD_ENABLE EP93XX_GPIO_LINE_EGPIO1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static int vision_lcd_setup(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) err = gpio_request_one(VISION_LCD_ENABLE, GPIOF_INIT_HIGH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) dev_name(&pdev->dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_RAS |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) EP93XX_SYSCON_DEVCFG_RASONP3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) EP93XX_SYSCON_DEVCFG_EXVC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) static void vision_lcd_teardown(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) gpio_free(VISION_LCD_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static void vision_lcd_blank(int blank_mode, struct fb_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) if (blank_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) gpio_set_value(VISION_LCD_ENABLE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) gpio_set_value(VISION_LCD_ENABLE, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static struct ep93xxfb_mach_info ep93xxfb_info __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .flags = EP93XXFB_USE_SDCSN0 | EP93XXFB_PCLK_FALLING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .setup = vision_lcd_setup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .teardown = vision_lcd_teardown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .blank = vision_lcd_blank,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) /*************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * GPIO Expanders
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) *************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define PCA9539_74_GPIO_BASE (EP93XX_GPIO_LINE_MAX + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define PCA9539_75_GPIO_BASE (PCA9539_74_GPIO_BASE + 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define PCA9539_76_GPIO_BASE (PCA9539_75_GPIO_BASE + 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define PCA9539_77_GPIO_BASE (PCA9539_76_GPIO_BASE + 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static struct pca953x_platform_data pca953x_74_gpio_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .gpio_base = PCA9539_74_GPIO_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .irq_base = EP93XX_BOARD_IRQ(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static struct pca953x_platform_data pca953x_75_gpio_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .gpio_base = PCA9539_75_GPIO_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) .irq_base = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static struct pca953x_platform_data pca953x_76_gpio_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .gpio_base = PCA9539_76_GPIO_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .irq_base = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static struct pca953x_platform_data pca953x_77_gpio_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .gpio_base = PCA9539_77_GPIO_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) .irq_base = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) /*************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) * I2C Bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) *************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static struct i2c_board_info vision_i2c_info[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) I2C_BOARD_INFO("isl1208", 0x6f),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .irq = IRQ_EP93XX_EXT1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) I2C_BOARD_INFO("pca9539", 0x74),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .platform_data = &pca953x_74_gpio_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) I2C_BOARD_INFO("pca9539", 0x75),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) .platform_data = &pca953x_75_gpio_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) I2C_BOARD_INFO("pca9539", 0x76),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .platform_data = &pca953x_76_gpio_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) I2C_BOARD_INFO("pca9539", 0x77),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) .platform_data = &pca953x_77_gpio_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) /*************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) * SPI CS4271 Audio Codec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) *************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) static struct cs4271_platform_data vision_cs4271_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) .gpio_nreset = EP93XX_GPIO_LINE_H(2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) /*************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) * SPI Flash
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) *************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) static struct mtd_partition vision_spi_flash_partitions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) .name = "SPI bootstrap",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) .offset = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) .size = SZ_4K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) .name = "Bootstrap config",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) .size = SZ_4K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) .name = "System config",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) .size = MTDPART_SIZ_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) static struct flash_platform_data vision_spi_flash_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) .name = "SPI Flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) .parts = vision_spi_flash_partitions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) .nr_parts = ARRAY_SIZE(vision_spi_flash_partitions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) /*************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) * SPI SD/MMC host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) *************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) static struct mmc_spi_platform_data vision_spi_mmc_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) .detect_delay = 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) .powerup_msecs = 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) .caps2 = MMC_CAP2_RO_ACTIVE_HIGH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) static struct gpiod_lookup_table vision_spi_mmc_gpio_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) .dev_id = "mmc_spi.2", /* "mmc_spi @ CS2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) /* Card detect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) GPIO_LOOKUP_IDX("B", 7, NULL, 0, GPIO_ACTIVE_LOW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) /* Write protect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) GPIO_LOOKUP_IDX("F", 0, NULL, 1, GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) /*************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) * SPI Bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) *************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) static struct spi_board_info vision_spi_board_info[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) .modalias = "cs4271",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) .platform_data = &vision_cs4271_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) .max_speed_hz = 6000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) .bus_num = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) .chip_select = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) .mode = SPI_MODE_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) .modalias = "sst25l",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) .platform_data = &vision_spi_flash_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) .max_speed_hz = 20000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) .bus_num = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) .chip_select = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) .mode = SPI_MODE_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) .modalias = "mmc_spi",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) .platform_data = &vision_spi_mmc_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) .max_speed_hz = 20000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) .bus_num = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) .chip_select = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) .mode = SPI_MODE_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) static struct gpiod_lookup_table vision_spi_cs_gpio_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) .dev_id = "spi0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) GPIO_LOOKUP_IDX("A", 6, "cs", 0, GPIO_ACTIVE_LOW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) GPIO_LOOKUP_IDX("A", 7, "cs", 1, GPIO_ACTIVE_LOW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) GPIO_LOOKUP_IDX("G", 2, "cs", 2, GPIO_ACTIVE_LOW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) static struct ep93xx_spi_info vision_spi_master __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) .use_dma = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) /*************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) * I2S Audio
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) *************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) static struct platform_device vision_audio_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) .name = "edb93xx-audio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) static void __init vision_register_i2s(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) ep93xx_register_i2s();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) platform_device_register(&vision_audio_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) /*************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) * Machine Initialization
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) *************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) static void __init vision_init_machine(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) ep93xx_init_devices();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_64M);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) ep93xx_register_eth(&vision_eth_data, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) ep93xx_register_fb(&ep93xxfb_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) ep93xx_register_pwm(1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) * Request the gpio expander's interrupt gpio line now to prevent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) * the kernel from doing a WARN in gpiolib:gpio_ensure_requested().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) if (gpio_request_one(EP93XX_GPIO_LINE_F(7), GPIOF_DIR_IN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) "pca9539:74"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) pr_warn("cannot request interrupt gpio for pca9539:74\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) vision_i2c_info[1].irq = gpio_to_irq(EP93XX_GPIO_LINE_F(7));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) ep93xx_register_i2c(vision_i2c_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) ARRAY_SIZE(vision_i2c_info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) gpiod_add_lookup_table(&vision_spi_mmc_gpio_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) gpiod_add_lookup_table(&vision_spi_cs_gpio_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) ep93xx_register_spi(&vision_spi_master, vision_spi_board_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) ARRAY_SIZE(vision_spi_board_info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) vision_register_i2s();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) MACHINE_START(VISION_EP9307, "Vision Engraving Systems EP9307")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) /* Maintainer: H Hartley Sweeten <hsweeten@visionengravers.com> */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) .atag_offset = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) .map_io = vision_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) .init_irq = ep93xx_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) .init_time = ep93xx_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) .init_machine = vision_init_machine,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) .init_late = ep93xx_init_late,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) .restart = ep93xx_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) MACHINE_END
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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