Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * arch/arm/mach-ep93xx/include/mach/ts72xx.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * TS72xx memory map:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  * virt		phys		size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  * febff000	22000000	4K	model number register (bits 0-2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  * febfe000	22400000	4K	options register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  * febfd000	22800000	4K	options register #2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)  * febfc000     23400000        4K      CPLD version register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #ifndef __TS72XX_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define __TS72XX_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define TS72XX_MODEL_PHYS_BASE		0x22000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define TS72XX_MODEL_VIRT_BASE		IOMEM(0xfebff000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define TS72XX_MODEL_SIZE		0x00001000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define TS72XX_MODEL_TS7200		0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define TS72XX_MODEL_TS7250		0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define TS72XX_MODEL_TS7260		0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define TS72XX_MODEL_TS7300		0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define TS72XX_MODEL_TS7400		0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define TS72XX_MODEL_MASK		0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define TS72XX_OPTIONS_PHYS_BASE	0x22400000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define TS72XX_OPTIONS_VIRT_BASE	IOMEM(0xfebfe000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define TS72XX_OPTIONS_SIZE		0x00001000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define TS72XX_OPTIONS_COM2_RS485	0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define TS72XX_OPTIONS_MAX197		0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define TS72XX_OPTIONS2_PHYS_BASE	0x22800000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define TS72XX_OPTIONS2_VIRT_BASE	IOMEM(0xfebfd000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define TS72XX_OPTIONS2_SIZE		0x00001000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define TS72XX_OPTIONS2_TS9420		0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define TS72XX_OPTIONS2_TS9420_BOOT	0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define TS72XX_CPLDVER_PHYS_BASE	0x23400000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define TS72XX_CPLDVER_VIRT_BASE	IOMEM(0xfebfc000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define TS72XX_CPLDVER_SIZE		0x00001000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #ifndef __ASSEMBLY__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static inline int ts72xx_model(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	return __raw_readb(TS72XX_MODEL_VIRT_BASE) & TS72XX_MODEL_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) static inline int board_is_ts7200(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	return ts72xx_model() == TS72XX_MODEL_TS7200;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static inline int board_is_ts7250(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 	return ts72xx_model() == TS72XX_MODEL_TS7250;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static inline int board_is_ts7260(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 	return ts72xx_model() == TS72XX_MODEL_TS7260;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static inline int board_is_ts7300(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 	return ts72xx_model()  == TS72XX_MODEL_TS7300;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) static inline int board_is_ts7400(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) 	return ts72xx_model() == TS72XX_MODEL_TS7400;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static inline int is_max197_installed(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) 	return !!(__raw_readb(TS72XX_OPTIONS_VIRT_BASE) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) 					TS72XX_OPTIONS_MAX197);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) static inline int is_ts9420_installed(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) 	return !!(__raw_readb(TS72XX_OPTIONS2_VIRT_BASE) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) 					TS72XX_OPTIONS2_TS9420);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #endif /* __TS72XX_H_ */