^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /* Include file for the EP93XX GPIO controller machine specifics */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #ifndef __GPIO_EP93XX_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #define __GPIO_EP93XX_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <mach/ep93xx-regs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define EP93XX_GPIO_PHYS_BASE EP93XX_APB_PHYS(0x00040000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define EP93XX_GPIO_BASE EP93XX_APB_IOMEM(0x00040000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define EP93XX_GPIO_REG(x) (EP93XX_GPIO_BASE + (x))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define EP93XX_GPIO_F_INT_STATUS EP93XX_GPIO_REG(0x5c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define EP93XX_GPIO_A_INT_STATUS EP93XX_GPIO_REG(0xa0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define EP93XX_GPIO_B_INT_STATUS EP93XX_GPIO_REG(0xbc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define EP93XX_GPIO_EEDRIVE EP93XX_GPIO_REG(0xc8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) /* GPIO port A. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define EP93XX_GPIO_LINE_A(x) ((x) + 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define EP93XX_GPIO_LINE_EGPIO0 EP93XX_GPIO_LINE_A(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define EP93XX_GPIO_LINE_EGPIO1 EP93XX_GPIO_LINE_A(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define EP93XX_GPIO_LINE_EGPIO2 EP93XX_GPIO_LINE_A(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define EP93XX_GPIO_LINE_EGPIO3 EP93XX_GPIO_LINE_A(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define EP93XX_GPIO_LINE_EGPIO4 EP93XX_GPIO_LINE_A(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define EP93XX_GPIO_LINE_EGPIO5 EP93XX_GPIO_LINE_A(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define EP93XX_GPIO_LINE_EGPIO6 EP93XX_GPIO_LINE_A(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define EP93XX_GPIO_LINE_EGPIO7 EP93XX_GPIO_LINE_A(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /* GPIO port B. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define EP93XX_GPIO_LINE_B(x) ((x) + 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define EP93XX_GPIO_LINE_EGPIO8 EP93XX_GPIO_LINE_B(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define EP93XX_GPIO_LINE_EGPIO9 EP93XX_GPIO_LINE_B(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define EP93XX_GPIO_LINE_EGPIO10 EP93XX_GPIO_LINE_B(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define EP93XX_GPIO_LINE_EGPIO11 EP93XX_GPIO_LINE_B(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define EP93XX_GPIO_LINE_EGPIO12 EP93XX_GPIO_LINE_B(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define EP93XX_GPIO_LINE_EGPIO13 EP93XX_GPIO_LINE_B(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define EP93XX_GPIO_LINE_EGPIO14 EP93XX_GPIO_LINE_B(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define EP93XX_GPIO_LINE_EGPIO15 EP93XX_GPIO_LINE_B(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /* GPIO port C. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define EP93XX_GPIO_LINE_C(x) ((x) + 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define EP93XX_GPIO_LINE_ROW0 EP93XX_GPIO_LINE_C(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define EP93XX_GPIO_LINE_ROW1 EP93XX_GPIO_LINE_C(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define EP93XX_GPIO_LINE_ROW2 EP93XX_GPIO_LINE_C(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define EP93XX_GPIO_LINE_ROW3 EP93XX_GPIO_LINE_C(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define EP93XX_GPIO_LINE_ROW4 EP93XX_GPIO_LINE_C(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define EP93XX_GPIO_LINE_ROW5 EP93XX_GPIO_LINE_C(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define EP93XX_GPIO_LINE_ROW6 EP93XX_GPIO_LINE_C(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define EP93XX_GPIO_LINE_ROW7 EP93XX_GPIO_LINE_C(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) /* GPIO port D. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define EP93XX_GPIO_LINE_D(x) ((x) + 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define EP93XX_GPIO_LINE_COL0 EP93XX_GPIO_LINE_D(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define EP93XX_GPIO_LINE_COL1 EP93XX_GPIO_LINE_D(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define EP93XX_GPIO_LINE_COL2 EP93XX_GPIO_LINE_D(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define EP93XX_GPIO_LINE_COL3 EP93XX_GPIO_LINE_D(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define EP93XX_GPIO_LINE_COL4 EP93XX_GPIO_LINE_D(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define EP93XX_GPIO_LINE_COL5 EP93XX_GPIO_LINE_D(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define EP93XX_GPIO_LINE_COL6 EP93XX_GPIO_LINE_D(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define EP93XX_GPIO_LINE_COL7 EP93XX_GPIO_LINE_D(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /* GPIO port E. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define EP93XX_GPIO_LINE_E(x) ((x) + 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define EP93XX_GPIO_LINE_GRLED EP93XX_GPIO_LINE_E(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define EP93XX_GPIO_LINE_RDLED EP93XX_GPIO_LINE_E(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define EP93XX_GPIO_LINE_DIORn EP93XX_GPIO_LINE_E(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define EP93XX_GPIO_LINE_IDECS1n EP93XX_GPIO_LINE_E(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define EP93XX_GPIO_LINE_IDECS2n EP93XX_GPIO_LINE_E(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define EP93XX_GPIO_LINE_IDEDA0 EP93XX_GPIO_LINE_E(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define EP93XX_GPIO_LINE_IDEDA1 EP93XX_GPIO_LINE_E(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define EP93XX_GPIO_LINE_IDEDA2 EP93XX_GPIO_LINE_E(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /* GPIO port F. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define EP93XX_GPIO_LINE_F(x) ((x) + 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define EP93XX_GPIO_LINE_WP EP93XX_GPIO_LINE_F(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define EP93XX_GPIO_LINE_MCCD1 EP93XX_GPIO_LINE_F(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define EP93XX_GPIO_LINE_MCCD2 EP93XX_GPIO_LINE_F(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define EP93XX_GPIO_LINE_MCBVD1 EP93XX_GPIO_LINE_F(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define EP93XX_GPIO_LINE_MCBVD2 EP93XX_GPIO_LINE_F(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define EP93XX_GPIO_LINE_VS1 EP93XX_GPIO_LINE_F(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define EP93XX_GPIO_LINE_READY EP93XX_GPIO_LINE_F(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define EP93XX_GPIO_LINE_VS2 EP93XX_GPIO_LINE_F(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /* GPIO port G. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define EP93XX_GPIO_LINE_G(x) ((x) + 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define EP93XX_GPIO_LINE_EECLK EP93XX_GPIO_LINE_G(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define EP93XX_GPIO_LINE_EEDAT EP93XX_GPIO_LINE_G(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define EP93XX_GPIO_LINE_SLA0 EP93XX_GPIO_LINE_G(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define EP93XX_GPIO_LINE_SLA1 EP93XX_GPIO_LINE_G(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define EP93XX_GPIO_LINE_DD12 EP93XX_GPIO_LINE_G(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define EP93XX_GPIO_LINE_DD13 EP93XX_GPIO_LINE_G(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define EP93XX_GPIO_LINE_DD14 EP93XX_GPIO_LINE_G(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define EP93XX_GPIO_LINE_DD15 EP93XX_GPIO_LINE_G(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /* GPIO port H. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define EP93XX_GPIO_LINE_H(x) ((x) + 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define EP93XX_GPIO_LINE_DD0 EP93XX_GPIO_LINE_H(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define EP93XX_GPIO_LINE_DD1 EP93XX_GPIO_LINE_H(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define EP93XX_GPIO_LINE_DD2 EP93XX_GPIO_LINE_H(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define EP93XX_GPIO_LINE_DD3 EP93XX_GPIO_LINE_H(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define EP93XX_GPIO_LINE_DD4 EP93XX_GPIO_LINE_H(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define EP93XX_GPIO_LINE_DD5 EP93XX_GPIO_LINE_H(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define EP93XX_GPIO_LINE_DD6 EP93XX_GPIO_LINE_H(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define EP93XX_GPIO_LINE_DD7 EP93XX_GPIO_LINE_H(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) /* maximum value for gpio line identifiers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define EP93XX_GPIO_LINE_MAX EP93XX_GPIO_LINE_H(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) /* maximum value for irq capable line identifiers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define EP93XX_GPIO_LINE_MAX_IRQ EP93XX_GPIO_LINE_F(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #endif /* __GPIO_EP93XX_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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