Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2)  * arch/arm/mach-dove/irq.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * Dove IRQ handling.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * This file is licensed under the terms of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * License version 2.  This program is licensed "as is" without any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * warranty of any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/exception.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <plat/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <plat/orion-gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include "pm.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include "bridge-regs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include "common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) static int __initdata gpio0_irqs[4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	IRQ_DOVE_GPIO_0_7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	IRQ_DOVE_GPIO_8_15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	IRQ_DOVE_GPIO_16_23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	IRQ_DOVE_GPIO_24_31,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) static int __initdata gpio1_irqs[4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	IRQ_DOVE_HIGH_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static int __initdata gpio2_irqs[4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static void __iomem *dove_irq_base = IRQ_VIRT_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static asmlinkage void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) __exception_irq_entry dove_legacy_handle_irq(struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	u32 stat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	stat = readl_relaxed(dove_irq_base + IRQ_CAUSE_LOW_OFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	stat &= readl_relaxed(dove_irq_base + IRQ_MASK_LOW_OFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	if (stat) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 		unsigned int hwirq = 1 + __fls(stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 		handle_IRQ(hwirq, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	stat = readl_relaxed(dove_irq_base + IRQ_CAUSE_HIGH_OFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	stat &= readl_relaxed(dove_irq_base + IRQ_MASK_HIGH_OFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	if (stat) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 		unsigned int hwirq = 33 + __fls(stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 		handle_IRQ(hwirq, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) void __init dove_init_irq(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 	orion_irq_init(1, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 	orion_irq_init(33, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 	set_handle_irq(dove_legacy_handle_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 	 * Initialize gpiolib for GPIOs 0-71.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 	orion_gpio_init(NULL, 0, 32, DOVE_GPIO_LO_VIRT_BASE, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 			IRQ_DOVE_GPIO_START, gpio0_irqs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) 	orion_gpio_init(NULL, 32, 32, DOVE_GPIO_HI_VIRT_BASE, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) 			IRQ_DOVE_GPIO_START + 32, gpio1_irqs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) 	orion_gpio_init(NULL, 64, 8, DOVE_GPIO2_VIRT_BASE, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) 			IRQ_DOVE_GPIO_START + 64, gpio2_irqs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }