^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * mach/sram.h - DaVinci simple SRAM allocator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2009 David Brownell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #ifndef __MACH_SRAM_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define __MACH_SRAM_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) /* ARBITRARY: SRAM allocations are multiples of this 2^N size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define SRAM_GRANULARITY 512
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * SRAM allocations return a CPU virtual address, or NULL on error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * If a DMA address is requested and the SRAM supports DMA, its
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * mapped address is also returned.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * Errors include SRAM memory not being available, and requesting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * DMA mapped SRAM on systems which don't allow that.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) extern void *sram_alloc(size_t len, dma_addr_t *dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) extern void sram_free(void *addr, size_t len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) /* Get the struct gen_pool * for use in platform data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) extern struct gen_pool *sram_get_gen_pool(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #endif /* __MACH_SRAM_H */